74AHC573PW - NXP

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

74AHC573PW
Manufacturer

NXP
ChipWorker Part#

CW241516637
Category

Latche IC
Package

TSSOP
Description

Octal D-type transparant latch; 3-state
Documentation

Datasheet

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74AHC573PW Specifications

Attribute	Attribute Value

Part Number	74AHC573PW
Manufacturer	NXP
ChipWorker Part#	CW241516637
Category	Latche IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	20 Pin
Case/Package	TSSOP
Supply Voltage (DC)	5.00 V
Number of Bits	8 Bit
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-40 ℃
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Size-Length	6.6 mm
Size-Width	4.5 mm
Size-Height	0.95 mm
Product Lifecycle Status	Unknown
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free

Product Description

General description
The 74AHC573; 74AHCT573 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A.
The 74AHC573; 74AHCT573 consists of eight D-type transparent latches featuring separate D-type inputs for each latch and 3-state true outputs for bus oriented applications. A latch enable input (LE) and an output enable input (OE) are common to all latches.
Features and benefits
 Balanced propagation delays
 All inputs have a Schmitt trigger action
 Common 3-state output enable input
 Functionally identical to the 74AHC373; 74AHCT373
 Inputs accept voltages higher than VCC
 Input levels:
For 74AHC573: CMOS input level
 For 74AHCT573: TTL input level
 ESD protection:
HBM EIA/JESD22-A114E exceeds 2000 V
 MM EIA/JESD22-A115-A exceeds 200 V
CDM EIA/JESD22-C101C exceeds 1000 V
 Multiple package options
 Specified from40℃ to +85℃ and from 40℃ to +125℃

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