74AVC1T45GW - NXP

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

74AVC1T45GW
Manufacturer

NXP
ChipWorker Part#

CW59561524
Category

Logic Controller, Logic IC
Package

SOT-363
Description

NXP 74AVC1T45GW Transceiver, 74AVC1T245, 800mV to 3.6V, SOT-363-6
Documentation

Datasheet

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74AVC1T45GW Specifications

Attribute	Attribute Value

Part Number	74AVC1T45GW
Manufacturer	NXP
ChipWorker Part#	CW59561524
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	6 Pin
Case/Package	SOT-363
Supply Voltage (DC)	3.60V (max)
Number of Positions	6 Position
Data Rate	500 Mbps
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage (Max)	3.6 V
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Size-Length	2.2 mm
Size-Width	1.35 mm
Size-Height	1 mm
Operating Temperature	-40℃ ~ 125℃
Product Lifecycle Status	Unknown
Packaging	Each
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/12/17

Product Description

The 74AVC1T45GW is a single-bit dual supply Voltage Level Translator/Transceiver with 3-state output that enables bidirectional level translation. It features two 1-bit input-output ports, a direction control input and dual supply pins. Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8 and 3.6V making the device suitable for translating between any of the low voltage nodes. Pins A and DIR are referenced to VCC(A) and pin B is referenced to VCC(B). A HIGH on DIR allows transmission from A to B and a LOW on DIR allows transmission from B to A. The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A and B are in the high-impedance OFF-state.
High noise immunity
Suspend mode
IOFF circuitry provides partial power-down mode operation
Complies with JEDEC standards
Latch-up performance exceeds 100mA per JESD 78 class II
Inputs accept voltages up to 3.6V
Low noise overshoot and undershoot <10% of VCC

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