74HC191D ,Counter, Counter IC - NXP

The pictures are for reference only, and the specific specifications can be found in the product manual.

Popularity Score

75 points

Part No

74HC191D
Manufacturer

NXP
ChipWorker Part#

CW77348267
Category

Counter, Counter IC
Package

SOIC
Description

NXP 74HC191D Binary Synchronous Counter, HC Family, 39MHz, 1 Gate, 4Input, 2V to 6V, SOIC-16
Documentation

Datasheet
Ships from

Moscow
Наличие

1999 pcs In Stock
Estimated Price

$ 0.17

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74HC191D Specifications

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Attribute	Attribute Value

Part Number	74HC191D
Manufacturer	NXP
ChipWorker Part#	CW77348267
Category	Counter, Counter IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	16 Pin
Case/Package	SOIC
Frequency	39 MHz
Supply Voltage (DC)	2.00V (min)
Number of Positions	16 Position
Clock Speed	39 MHz
Number of Gates	1 Gate
Number of Inputs	4 Input
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	5 V
Supply Voltage (Max)	6 V
Supply Voltage (Min)	2 V
	expand all
Size-Length	10 mm
Size-Width	4 mm
Size-Height	1.45 mm
Operating Temperature	-40℃ ~ 125℃
Product Lifecycle Status	Unknown
Packaging	Each
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/12/17

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Product Description

The 74HC191D is a presettable synchronous 4-bit binary Up/Down Counter, pin compatible with low power Schottky TTL (LSTTL). It is asynchronously presettable 4-bit binary up/down counters. They contain four master/slave flip-flops with internal gating and steering logic to provide asynchronous preset and synchronous count-up and count-down operation. Asynchronous parallel load capability permits the counter to be preset to any desired number. Information present on the parallel data inputs (D0 to D3) is loaded into the counter and appears on the outputs when the parallel load (PL\\) input is low. Counting is inhibited by a HIGH level on the count enable (CE\\) input. When CE\ is low internal state changes are initiated synchronously by the low-to-high transition of the clock input. The up/down (U\/D) input signal determines the direction of counting. The CE input may go low when the clock is in either state, however, the low-to-high CE\ transition must occur only when the clock is high.
Synchronous reversible counting
Count enable control for synchronous expansion
Single up/down control input
Standard Output capability
ICC Category

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