74HC573N - NXP

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

74HC573N
Manufacturer

NXP
ChipWorker Part#

CW81737924
Category

Latche IC
RoHS

Lead free / RoHS Compliant
Description

NXP 74HC573N Latch, 74HC573, D Type Transparent, Tri State Non Inverted, 14ns, 7.8mA, DIP
Documentation

Datasheet

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74HC573N Specifications

Attribute	Attribute Value

Part Number	74HC573N
Manufacturer	NXP
ChipWorker Part#	CW81737924
Category	Latche IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	20 Pin
Case/Package	DIP
Supply Voltage (DC)	5.00 V, 6.00 V (max)
Output Current	7.8 mA
Number of Circuits	8 Circuit
Number of Positions	20 Position
Number of Bits	8 Bit
Polarity	Non-Inverting
Number of Gates	8 Gate
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage (Max)	6 V
Supply Voltage (Min)	2 V
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Product Lifecycle Status	Unknown
Packaging	Each
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/12/17

Product Description

The 74HC573N is an octal D-type Transparent Latch with 3-state is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL (LSTTL ). It is specified in compliance with JEDEC standard no-7A. The octal D-type transparent latch featuring separate D-type inputs for each latch and 3-state true outputs for bus-oriented applications. A latch enable (LE) input and an output enable (OE) input are common to all latches. When LE is high, data at the Dn inputs enter the latches. In this condition the latches are transparent, i.e. a latch output will change state each time its corresponding D-input changes. When LE is low the latches store the information that was present at the D-inputs a set-up time preceding the high-to-low transition of LE. When OE is low, the contents of the 8-latches are available at the outputs. When OE is high, the outputs go to the high-impedance OFF-state. Operation of the OE input does not affect the state of the latches.
CMOS input level
ESD protection HBM JESD22-A114F exceeds 2000V
ESD sensitive device, take proper precaution while handling the device.

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