74HCT221D - NXP

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

74HCT221D
Manufacturer

NXP
ChipWorker Part#

CW95239307
Category

Flip Flop IC
Package

SOIC
Description

NXP 74HCT221D Monostable Multivibrator, 74HCT221, 30ns, 4mA, 4.5V to 5.5V, SOIC-16
Documentation

Datasheet

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74HCT221D Specifications

Attribute	Attribute Value

Part Number	74HCT221D
Manufacturer	NXP
ChipWorker Part#	CW95239307
Category	Flip Flop IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	16 Pin
Case/Package	SOIC
Supply Voltage (DC)	4.50V (min)
Output Current	4 mA
Number of Positions	16 Position
Number of Gates	2 Gate
Rise Time	6 ns
Fall Time	6 ns
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	5 V
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	4.5 V
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Size-Length	10 mm
Size-Width	4 mm
Size-Height	1.45 mm
Operating Temperature	-40℃ ~ 125℃
Product Lifecycle Status	Unknown
Packaging	Each
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/12/17

Product Description

The 74HCT221D is a dual non-retriggerable Monostable Multivibrator with a reset. It is pin compatible with the low power Schottky TTL (LSTTL). Each multivibrator features an active low-going edge input (nA\\) and an active high-going edge input (nB), either of which can be used as an enable input. Pulse triggering occurs at a particular voltage level and is not directly related to the transition time of the input pulse. Schmitt-trigger input circuitry for the nB inputs allow jitter-free triggering from inputs with slow transition rates, providing the circuit with excellent noise immunity. once triggered, the outputs (nQ, nQ\\) are independent of further transitions of nA\ and nB inputs and are a function of the timing components. The output pulses can be terminated by the overriding active low reset inputs (nRD\\). Input pulses may be of any duration relative to the output pulse.
Pulse width variance is typically less than ±5%
Pin-out identical to "123"
Overriding reset terminates output pulse
nB Inputs have hysteresis for improved noise immunity
Output capability - Standard (except for nREXT/CEXT)
Complies with JEDEC standard No. 7A

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