74HCT573D ,Latche IC - NXP

The pictures are for reference only, and the specific specifications can be found in the product manual.

Popularity Score

82 points

Part No

74HCT573D
Manufacturer

NXP
ChipWorker Part#

CW73742500
Category

Latche IC
Package

SOIC
Description

NXP 74HCT573D Latch, HCT Family, 74HCT573, Transparent, Tri State Non Inverted, 20ns, 6mA, SOIC
Documentation

Datasheet
Ships from

Moscow
Наличие

3968 pcs In Stock
Estimated Price

$ 0.15

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74HCT573D Specifications

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Attribute	Attribute Value

Part Number	74HCT573D
Manufacturer	NXP
ChipWorker Part#	CW73742500
Category	Latche IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	20 Pin
Case/Package	SOIC
Supply Voltage (DC)	5.00 V
Output Current	6 mA
Number of Channels	8 Channel
Number of Positions	20 Position
Number of Bits	8 Bit
Polarity	Non-Inverting
Number of Gates	8 Gate
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	4.5 V
	expand all
Product Lifecycle Status	Unknown
Packaging	Each
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/12/17

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Product Description

The 74HCT573D is an octal transparent D Latch with 3-state outputs. It features LE and OE\ inputs. When LE is high, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is low the latches store the information that was present at the inputs a set-up time preceding the high-to-low transition of LE. A high on OE\ causes the outputs to assume a high-impedance OFF-state. Operation of the OE\ input does not affect the state of the latches. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Inputs and outputs on opposite sides of package allowing easy interface with microprocessors
Useful as input or output port for microprocessors and microcomputers
3-state Non-inverting outputs for bus-oriented applications
TTL Input level
Complies with JEDEC standard No. 7A

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