AD9136BCPZ - ADI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

AD9136BCPZ
Manufacturer

ADI
ChipWorker Part#

CW21357304
Category

Digital to Analog, DAC IC
Package

LFCSP-88
Description

ANALOG DEVICES AD9136BCPZ Digital to Analog Converter, Dual, 16Bit, 2.8GSPS, Serial, 3.13V to 3.47V, LFCSP, 88Pins
Documentation

Datasheet

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AD9136BCPZ Specifications

Attribute	Attribute Value

Part Number	AD9136BCPZ
Manufacturer	ADI
ChipWorker Part#	CW21357304
Category	Digital to Analog, DAC IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	88 Pin
Case/Package	LFCSP-88
Number of Outputs	2 Output
Number of Channels	2 Channel
Number of Positions	88 Position
Number of Bits	16 Bit
Sample Rate	2.80 GHz
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Number of DACs	2 DAC
Supply Voltage	3.13V ~ 3.47V
	expand all
Size-Length	12.1 mm
Size-Width	11.85 mm
Size-Height	0.855 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Cut Tape (CT)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2016/06/20
ECCN Code	3A001.a.5.b.2

Product Description

Product Details
The AD9136 is a dual, 16-bit, high dynamic range digital-to-analog converter (DAC) that provides a maximum sample rate of 2800 MSPS, permitting a multicarrier generation over a very wide bandwidth. The DAC outputs are optimized to interface seamlessly with the ADRF6720, as well as other analog quadrature modulators (AQMs) from Analog Devices, Inc. An optional 3-wire or 4-wire serial port interface (SPI) provides for programming/readback of many internal parameters. The full-scale output current can be programmed over a typical range of 13.9 mA to 27.0 mA. The AD9136 is available in an 88-lead LFCSP.
**Product Highlights**
1. Greater than 2 GHz, ultrawide complex signal bandwidth enables emerging wideband and multiband wireless applications.
2. Advanced low spurious and distortion design techniques provide high quality synthesis of wideband signals from baseband to high intermediate frequencies.
3. JESD204B Subclass 1 support simplifies multichip synchronization in software and hardware design.
4. Fewer pins for data interface width with a serializer/deserializer (SERDES) JESD204B eight-lane interface.
5. Programmable transmit enable function allows easy design balance between power consumption and wake-up time.
6. Small package size with 12 mm × 12 mm footprint.
**Applications**
Wireless communications
3G/4G W-CDMA base stations
Wideband repeaters
Software defined radios
Wideband communications
Point to point
Local multipoint distribution service (LMDS) and multichannel multipoint distribution service (MMDS)
Transmit diversity, multiple input/multiple output (MIMO)
Instrumentation
Automated test equipment
### Features and Benefits
Support input data rate >2 GSPS
Proprietary low spurious and distortion design
SFDR = 82 dBc at dc IF, −9 dBFS
Flexible 8-lane JESD204B interface
Multiple chip synchronization
Fixed latency
Data generator latency compensation
Selectable 1×, 2×, 4×, or 8× interpolation filter
Low power architecture
Transmit enable function allows extra power saving and instant control of the output status
High performance, low noise phase-locked loop (PLL) clock multiplier
Digital inverse sinc filter
Low power: 1.42 W at 1.6 GSPS full operating conditions
88-lead LFCSP with exposed pad

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