AD9777BSVZ - ADI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

AD9777BSVZ
Manufacturer

ADI
ChipWorker Part#

CW3240800
Category

Digital to Analog, DAC IC
Package

TQFP-80
Description

ANALOG DEVICES AD9777BSVZ Digital to Analog Converter, 16Bit, 400MSPS, Differential, Single Ended, 3.1V to 3.5V, TQFP
Documentation

Datasheet

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AD9777BSVZ Specifications

Attribute	Attribute Value

Part Number	AD9777BSVZ
Manufacturer	ADI
ChipWorker Part#	CW3240800
Category	Digital to Analog, DAC IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	80 Pin
Case/Package	TQFP-80
Supply Voltage (DC)	3.50V (max)
Number of Outputs	2 Output
Supply Current	72.5 mA
Number of Channels	2 Channel
Number of Positions	80 Position
Number of Bits	16 Bit
Power Dissipation	410 mW
Sample Rate	400 Msps
Resolution (Bits)	16.0 Bit
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Power Dissipation (Max)	410 mW
Number of DACs	2 DAC
Supply Voltage	3.1V ~ 3.5V
Supply Voltage (Max)	3.5 V
Supply Voltage (Min)	3.1 V
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Size-Length	14 mm
Size-Width	14 mm
Size-Height	1 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tray
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
Mil-Spec	No
REACH SVHC Compliance Edition	2016/06/20

Product Description

The AD9777BSVZ is a 16-bit interpolating dual Digital-to-analog Converter features a serial port interface (SPI) that provides a high level of programmability, thus allowing for enhanced system level options. The independent channel gain and offset adjust registers allow the user to calibrate LO feed-through and sideband suppression errors associated with analog quadrature modulators. The 6dB of gain adjustment range can also be used to control the output power level of DAC. The AD9777 features the ability to perform fS/2, fS/4 and fS/8 digital modulation and image rejection when combined with an analog quadrature modulator. In this mode, the AD9777 accepts I and Q complex data, generates a quadrature modulated IF signal along with its orthogonal representation via its dual DAC and presents these two reconstructed orthogonal IF carriers to an analog quadrature modulator to complete the image rejection up conversion process.
Programmable channel gain and offset adjustment
Direct IF transmission mode for 70MHz + Ifs
Enables image rejection architecture
Fully compatible SPI® port
Excellent AC performance
Internal PLL clock multiplier
Selectable internal clock divider
Versatile clock input
Differential/single-ended sine wave or TTL/CMOS/LVPECL compatible
Versatile input data interface
Twos complement/straight binary data coding
Dual-port or single-port interleaved input data
On-chip 1.2V reference

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