ADAU1979WBCPZ - ADI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

ADAU1979WBCPZ
Manufacturer

ADI
ChipWorker Part#

CW914793
Category

Analog to Digital, ADC IC
Package

LFCSP-40
Description

Analogue to Digital Converter, 24Bit, 192KSPS, Single, 3V, 3.6V, LFCSP
Documentation

Datasheet

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ADAU1979WBCPZ Specifications

Attribute	Attribute Value

Part Number	ADAU1979WBCPZ
Manufacturer	ADI
ChipWorker Part#	CW914793
Category	Analog to Digital, ADC IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	40 Pin
Case/Package	LFCSP-40
Supply Voltage (DC)	3.00V (min)
Output Voltage	0.4 V
Supply Current	1.75 mA
Number of Channels	4 Channel
Number of Positions	40 Position
Number of Bits	24 Bit
Power Dissipation	46.2 mW
Sample Rate	8ksps ~ 192ksps
Number of ADCs	4 ADC
Operating Temperature (Max)	105 ℃
Operating Temperature (Min)	-40 ℃
Power Dissipation (Max)	46.2 mW
Number of Input Channels	4 Channel
Supply Voltage	3.3 V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	3 V
	expand all
Operating Temperature	-40℃ ~ 105℃
Product Lifecycle Status	Active
Packaging	Tray
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2013/06/20
ECCN Code	EAR99

Product Description

Product Details
The ADAU1979 incorporates four high performance, analog-to-digital converters (ADCs) with 4.5 V rms capable ac-coupled inputs. The ADCs use a multibit sigma-delta (Σ-Δ) architecture with continuous time front end for low EMI. An I2C/serial peripheral interface (SPI) control port is included that allows a microcontroller to adjust volume and many other parameters. The ADAU1979 uses only a single 3.3 V supply. The device internally generates the required digital DVDD supply. The low power architecture reduces the power consumption. The on-chip PLL can derive the master clock from an external clock input or frame clock (sample rate clock). When fed with the frame clock, it eliminates the need for a separate high frequency master clock in the system. The ADAU1979 is available in a 40-lead LFCSP package.
Note that throughout this data sheet, multifunction pins, such as SCL/CCLK, are referred to either by the entire pin name or by a single function of the pin, for example, CCLK, when only that function is relevant.
**Applications**
Automotive audio systems
Active noise cancellation systems
### Features and Benefits
Four 4.5 V rms (typical) differential inputs
On-chip phase-locked loop (PLL) for master clock
Low electromagnetic interference (EMI) design
109 dB (typical) analog-to-digital converter (ADC) dynamic range
Total harmonic distortion + noise (THD + N): −95 dB (typical)
Selectable digital high-pass filter
24-bit stereo ADC with 8 kHz to 192 kHz sample rates
Digital volume control with autoramp function
See data sheet for additional features

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