ADCLK854BCPZ - ADI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

ADCLK854BCPZ
Manufacturer

ADI
ChipWorker Part#

CW694904
Category

Clock Buffer, Driver, PLL IC
Package

LFCSP-48
Description

Clock Multiplexer 12Out 2IN Triple 1:4 48Pin LFCSP EP Tray
Documentation

Datasheet

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ADCLK854BCPZ Specifications

Attribute	Attribute Value

Part Number	ADCLK854BCPZ
Manufacturer	ADI
ChipWorker Part#	CW694904
Category	Clock Buffer, Driver, PLL IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	48 Pin
Case/Package	LFCSP-48
Frequency	1.2 GHz
Supply Voltage (DC)	1.71V (min)
Number of Outputs	12 Output
Number of Circuits	1 Circuit
Number of Positions	48 Position
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	1.71V ~ 1.89V
Supply Voltage (Max)	1.89 V
Supply Voltage (Min)	1.71 V
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Size-Length	7 mm
Size-Width	7 mm
Size-Height	0.95 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tray
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance Edition	2015/12/17
ECCN Code	EAR99

Product Description

Product Details
The ADCLK854 is a 1.2 GHz/250 MHz LVDS/CMOS fanout buffer optimized for low jitter and low power operation. Possible configurations range from 12 LVDS to 24 CMOS outputs, including combinations of LVDS and CMOS outputs. Three control lines are used to determine whether fixed blocks of outputs (three banks of four) are LVDS or CMOS outputs.
The ADCLK854 offers two selectable inputs and a sleep mode feature. The IN_SEL pin state determines which input is fanned out to all the outputs. The SLEEP pin enables a sleep mode to power down the device.
The inputs accept various types of single-ended and differential logic levels including LVPECL, LVDS, HSTL, CML, and CMOS. Table 8 provides interface options for each type of connection.
This device is available in a 48-pin LFCSP package. It is specified for operation over the standard industrial temperature range of −40°C to +85°C.
### Features and Benefits
2 selectable differential inputs
Selectable LVDS/CMOS outputs
Up to 12 LVDS (1.2 GHz) or 24 CMOS (250 MHz) outputs
<12 mW per channel (100 MHz operation)
54 fs rms integrated jitter (12 kHz to 20 MHz)
100 fs rms additive broadband jitter
|
2.0 ns propagation delay (LVDS)
135 ps output rise/fall (LVDS)
70 ps output-to-output skew (LVDS)
Sleep mode
Pin programmable control
1.8 V power supply
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