ADN4650BRWZ - ADI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

ADN4650BRWZ
Manufacturer

ADI
ChipWorker Part#

CW1808604
Category

Interface Isolator, Digital Isolator
Package

SOIC-20
Description

LVDS Buffer 600Mbps 0.45V 20Pin SOIC W Tube
Documentation

Datasheet

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ADN4650BRWZ Specifications

Attribute	Attribute Value

Part Number	ADN4650BRWZ
Manufacturer	ADI
ChipWorker Part#	CW1808604
Category	Interface Isolator, Digital Isolator
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	20 Pin
Case/Package	SOIC-20
Rise/Fall Time	350ps, 350ps (Max)
Number of Channels	2 Channel
Power Dissipation	2780 W
Isolation Voltage	5000 Vrms
Input Current (Min)	5 μA
Fall Time (Max)	350 ps
Fall Time (Max)	350 ps
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-40 ℃
Power Dissipation (Max)	2780 mW
Supply Voltage	2.375V ~ 2.625V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	3 V
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Operating Temperature	-40℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
ECCN Code	EAR99

Product Description

Product Details
The ADN4650 is a signal isolated, low voltage differential signaling (LVDS) buffers that operate at up to 600 Mbps with very low jitter.
The devices integrate Analog Devices, Inc., iCoupler® technology, enhanced for high speed operation, to provide galvanic isolation of the TIA/EIA-644-A compliant LVDS drivers and receivers. This technology allows drop-in isolation of an LVDS signal chain.
For high speed operation with low jitter, the LVDS and isolator circuits rely on a 2.5 V supply. An integrated on-chip low dropout regulator (LDO) can provide the required 2.5 V from an external 3.3 V power supply. The devices are fully specified over a wide industrial temperature range and are available in a 20-lead, wide body SOIC package with 5 kV rms isolation or a 20-lead SSOP package with 3.75 kV rms isolation.
**Applications**
Analog front-end (AFE) isolation
Data plane isolation
Isolated high speed clock and data links
Isolated serial peripheral interface (SPI) over LVDS
### Features and Benefits
5 kV rms/3.75 kV rms LVDS isolator
Complies with TIA/EIA-644-A LVDS standard
Multiple dual-channel configurations
Up to 600 Mbps switching with low jitter
4.5 ns maximum propagation delay
151 ps maximum peak-to-peak total jitter at 600 Mbps
100 ps maximum pulse skew
600 ps maximum part to part skew
2.5 V or 3.3 V supplies
−75 dBc power supply ripple rejection and glitch immunity
±8 kV IEC 61000-4-2 ESD protection across isolation barrier
High common-mode transient immunity: >25 kV/μs
Passes EN55022 Class B radiated emissions limits with 600 Mbps PRBS
Safety and regulatory approvals (20-lead SOIC package)
UL (pending): 5000 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice 5A (pending)
VDE certificate of conformity (pending)
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
VIORM = 424 V peak
Fail-safe output high for open, short, and terminated input conditions (ADN4651/ADN4652)
Operating temperature range: −40°C to +125°C
Choice of package and isolation options
3.75 kV rms in highly integrated 20-lead SSOP
5 kV rms in 20-lead SOIC with 7.8 mm creepage/clearance

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- Carefully tested and packaged by ChipWorker
- Vacuum packed
- Anti-static packaging
- Anti-vibration foam
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- Decapsulation control
- X-ray inspection
- XRF inspection
- Electrical testing
- Surface testing

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