ADRF6601 - ADI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

ADRF6601
Manufacturer

ADI
ChipWorker Part#

CW389472653
RoHS

Lead free / RoHS Compliant
Description

750MHz to 1160MHz Rx Mixer with Integrated Fractional-N PLL and VCO
Documentation

Datasheet

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ADRF6601 Specifications

Attribute	Attribute Value

Part Number	ADRF6601
Manufacturer	ADI
ChipWorker Part#	CW389472653
Documentation	Datasheet
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Product Lifecycle Status	Recommended for New Designs
RoHS	RoHS Compliant

Product Description

Product Details
The ADRF6601 is a high dynamic range active mixer with an integrated phase-locked loop (PLL) and a voltage controlled oscillator (VCO). The PLL/synthesizer uses a fractional-N PLL to generate a fLO input to the mixer. The reference input can be divided or multiplied and then applied to the PLL phase frequency detector (PFD).
The PLL can support input reference frequencies from 12 MHz to 160 MHz. The PFD output controls a charge pump whose output drives an off-chip loop filter.
The loop filter output is then applied to an integrated VCO. The VCO output at 2 × fLO is applied to an LO divider, as well as to a programmable PLL divider. The programmable PLL divider is controlled by a sigma-delta (Σ-Δ) modulator (SDM). The modulus of the SDM can be programmed from 1 to 2047.
The active mixer converts the single-ended 50 Ω RF input to a 200 Ω differential IF output. The IF output can operate up to 500 MHz.
The ADRF6601 is fabricated using an advanced silicon-germanium BiCMOS process. It is available in a 40-lead, RoHS-compliant, 6 mm × 6 mm LFCSP with an exposed paddle. Performance is specified over the −40°C to +85°C temperature range.
**Applications**
Cellular base stations
### Features and Benefits
Rx mixer with integrated fractional-N PLL
RF input frequency range: 300 MHz to 2500 MHz
Internal LO frequency range:
750 MHz to 1160 MHz
Input P1dB: 14.5 dBm
Input IP3: 31 dBm
IIP3 optimization via external pin
SSB noise figure
IP3SET pin open: 13.5 dB
IP3SET pin at 3.3 V: 14.6 dB
Voltage conversion gain: 6.7 dB
Matched 200 Ω IF output impedance
IF 3 dB bandwidth: 500 MHz
Programmable via 3-wire SPI interface
40-lead, 6 mm × 6 mm LFCSP

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