ADS54J69IRMP - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

ADS54J69IRMP
Manufacturer

TI
ChipWorker Part#

CW36516790
Category

Analog to Digital, ADC IC
Package

VFQFN-72
Description

Dual-Channel, 16Bit, 500MSPS Analog-to-Digital Converter (ADC) 72-VQFN -40℃ to 85℃
Documentation

Datasheet

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ADS54J69IRMP Specifications

Attribute	Attribute Value

Part Number	ADS54J69IRMP
Manufacturer	TI
ChipWorker Part#	CW36516790
Category	Analog to Digital, ADC IC
Documentation	Datasheet
Number of Pins	72 Pin
Case/Package	VFQFN-72
Power Dissipation	2660 mW
Power Consumption	2.70 W
Number of ADCs	2 ADC
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Power Dissipation (Max)	3.1 W
Number of Input Channels	2 Channel
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Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free

Product Description

The ADS54J69 is a low-power, wide-bandwidth, 16-bit, 500-MSPS, dual-channel, analog-to-digital converter (ADC). Designed for high signal-to-noise ratio (SNR), the device delivers a noise floor of –159 dBFS/Hz for applications aiming for highest dynamic range over a wide instantaneous bandwidth. The device supports the JESD204B serial interface with data rates up to 10.0 Gbps, supporting one or two lanes per ADC. The buffered analog input provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy. Each ADC channel is directly connected to a wideband digital down-converter (DDC) block. The ADS54J69 provides excellent spurious-free dynamic range (SFDR) over a large input frequency range with very low power consumption.
The JESD204B interface reduces the number of interface lines, allowing high system integration density. An internal phase-locked loop (PLL) multiplies the ADC sampling clock to derive the bit clock that is used to serialize the 16-bit data from each channel.

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