CD40102BE - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

CD40102BE
Manufacturer

TI
ChipWorker Part#

CW15059196
Category

Logic Controller, Logic IC
Package

PDIP-16
Description

BCD Synchronous Down Counter, 4.8MHz, 3V to 18V, DIP-16
Documentation

Datasheet

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CD40102BE Specifications

Attribute	Attribute Value

Part Number	CD40102BE
Manufacturer	TI
ChipWorker Part#	CW15059196
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	16 Pin
Case/Package	PDIP-16
Frequency	4.8 MHz
Supply Voltage (DC)	15.0 V, 18.0 V (max)
Number of Outputs	1 Output
Number of Circuits	1 Circuit
Number of Positions	16 Position
Clock Speed	4.8 MHz
Number of Bits	1 Bit
Voltage Nodes	5.00 V, 10.0 V, 15.0 V
Number of Inputs	8 Input
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-55 ℃
Supply Voltage	3V ~ 18V
Supply Voltage (Max)	18 V
Supply Voltage (Min)	3 V
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Size-Length	19.3 mm
Size-Width	6.35 mm
Size-Height	4.57 mm
Weight	0.015227096868 kg
Operating Temperature	-55℃ ~ 105℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The CD40102BE is a 8-stage 2-decade presettable CMOS BCD synchronous Down Counter with a single output which is active when the internal count is zero. The CD40102B is configured as two cascaded 4-bit BCD counters, it has control inputs for enabling or disabling the clock, for clearing the counter to its maximum count and for presetting the counter either synchronously or asynchronously. All control inputs and the carry-out/zero-defect output is active-low logic. In normal operation, the counter is decremented by one count on each positive transition of the clock. Counting is inhibited when the carry-in/counter enable (CI/CE\\) input is high. The carry-out/zero-defect (CO/ZD\\) output goes low when the count reaches zero if the CI/CE\ input is low and remains low for one full clock period.
Synchronous or asynchronous preset
Cascadable
100% Tested for quiescent current at 20V
Standardized symmetrical output characteristics

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