CD40193BE - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

CD40193BE
Manufacturer

TI
ChipWorker Part#

CW629320
Category

Logic Controller, Logic IC
Package

PDIP-16
Description

TEXAS INSTRUMENTS CD40193BE Binary Up / Down Counter, 11MHz, 3V to 18V, DIP-16
Documentation

Datasheet

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CD40193BE Specifications

Attribute	Attribute Value

Part Number	CD40193BE
Manufacturer	TI
ChipWorker Part#	CW629320
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	16 Pin
Case/Package	PDIP-16
Supply Voltage (DC)	3.00V ~ 18.0V
Number of Outputs	4 Output
Number of Positions	16 Position
Clock Speed	11 MHz
Number of Bits	4 Bit
Voltage Nodes	5.00 V, 10.0 V, 15.0 V
Number of Inputs	4 Input
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-55 ℃
Supply Voltage	3V ~ 18V
Supply Voltage (Max)	18 V
Supply Voltage (Min)	3 V
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Size-Length	19.3 mm
Size-Width	6.35 mm
Size-Height	4.57 mm
Operating Temperature	-55℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The CD40193BE is a CMOS presettable binary Up/Down Counter with dual clock and reset consist of 4 synchronously clocked, gated "D" type flip-flops connected as a counter. The inputs consist of 4 individual jam lines, a preset, enable control, individual clock up and clock down signals and a master reset. Four buffered Q signal outputs as well as carry and borrow outputs for multiple-stage counting schemes are provided. The counter is cleared so that all outputs are in a low state by a high on the reset line. A reset is accomplished asynchronously with the clock. Each output is individually programmable asynchronously with the clock to the level on the corresponding jam input when the preset, enable control is low. The counter counts up one count on the positive clock edge of the clock up signal provided the clock down line is high. The counter counts down on count on the positive clock edge of the clock down signal provided the clock up line is high.
Individual clock lines for counting up or counting down
Synchronous high-speed carry and borrow propagation delays for cascading
Asynchronous reset and preset capability
Medium-speed operation
Standardized, symmetrical output characteristics
100% Tested for quiescent current at 20V
Maximum input current of 1µA at 18V

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