CD4052BCN - Fairchild

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

CD4052BCN
Manufacturer

Fairchild
ChipWorker Part#

CW116548129
Category

Interface IC, Interface Controller
Package

DIP-16
Description

Differential Multiplexer, 1 Func, 4Channel, CMOS, PDIP16, 0.3INCH, PLASTIC, MS-001, DIP-16
Documentation

Datasheet

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CD4052BCN Specifications

Attribute	Attribute Value

Part Number	CD4052BCN
Manufacturer	Fairchild
ChipWorker Part#	CW116548129
Category	Interface IC, Interface Controller
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	16 Pin
Case/Package	DIP-16
Supply Voltage (DC)	15.0 V
Number of Outputs	2 Output
Contacts Type	SP4T
Supply Current	20.0 µA
Number of Circuits	2 Circuit
Number of Channels	2 Channel
Number of Positions	16 Position
Polarity	Non-Inverting
Power Dissipation	0.7 W
Number of Gates	2 Gate
Bandwidth	40 MHz
Number of Inputs	8 Input
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-55 ℃
3dB Bandwidth	40 MHz
Supply Voltage	5V ~ 15V
Supply Voltage (Max)	15 V
Supply Voltage (Min)	5 V
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Size-Length	19.81 mm
Size-Width	6.35 mm
Size-Height	3.3 mm
Operating Temperature	-55℃ ~ 125℃ (TA)
Product Lifecycle Status	Unknown
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

General Description
The CD4051BC, CD4052BC, and CD4053BC analog multiplexers/demultiplexers are digitally controlled analog
switches having low “ON” impedance and very low “OFF” leakage currents. Control of analog signals up to 15V
p-p can be achieved by digital signal amplitudes of 3−15V. For example, if VDD =5V, VSS =0V and VEE = −5V, analog signals from −5V to +5V can be controlled by digital inputs of 0−5V. The multiplexer circuits dissipate extremely low quiescent power over the full VDD−VSS and VDD−VEE supply voltage ranges, independent of the logic state of the control signals. When a logical “1” is present at the inhibit input terminal all channels are “OFF”.
Features
■Wide range of digital and analog signal levels: digital 3 – 15V, analog to 15Vp-p
■Low “ON” resistance: 80Ω(typ.) over entire 15Vp-p signal-input range for VDD −VEE =15V
■High “OFF” resistance: channel leakage of ±10 pA (typ.) at VDD −VEE =10V
■Logic level conversion for digital addressing signals of 3 – 15V (VDD −VSS =3 – 15V) to switch analog signa
to 15 Vp-p(VDD −VEE =15V)
■Matched switch characteristics: ∆RON =5Ω(typ.) for VDD −VEE =15V
■Very low quiescent power dissipation under all digital-control input and supply conditions: 1 µW (typ.) at VDD −VSS =VDD −VEE =10V
■Binary address decoding on chip

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