CD4098BM - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

CD4098BM
Manufacturer

TI
ChipWorker Part#

CW8532969
Category

Flip Flop IC
Package

SOIC-16
Description

TEXAS INSTRUMENTS CD4098BM Monostable Multivibrator, CD4098, 100ns, 6.8mA, 3V to 18V, SOIC-16
Documentation

Datasheet

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CD4098BM Specifications

Attribute	Attribute Value

Part Number	CD4098BM
Manufacturer	TI
ChipWorker Part#	CW8532969
Category	Flip Flop IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	16 Pin
Case/Package	SOIC-16
Supply Voltage (DC)	15.0 V, 18.0 V (max)
Output Current	6.8 mA
Number of Channels	2 Channel
Number of Positions	16 Position
Number of Bits	2 Bit
Voltage Nodes	5.00 V, 10.0 V, 15.0 V
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-55 ℃
Supply Voltage	3V ~ 18V
Supply Voltage (Max)	18 V
Supply Voltage (Min)	3 V
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Size-Length	9.9 mm
Size-Width	3.91 mm
Size-Height	1.58 mm
Operating Temperature	-55℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The CD4098BM is a CMOS dual Monostable Multivibrator provides stable retriggerable/resettable one-shot operation for any fixed-voltage timing application. An external resistor (RX) and an external capacitor (CX) control the timing for the circuit. Adjustment of RX and CX provides a wide range of output pulse widths from the Q and Q\ terminals. The time delay from trigger input to output transition (trigger propagation delay) and the time delay from set input to output transition (RESET propagation delay) are independent of RX and CX. Leading-edge-triggering (+TR) and trailing-edge-triggering (-TR) input are provided for triggering from either edge of an input pulse. An unused +TR input should be tied to VSS. An unused (-TR) input should be tied to VDD. A RESET (on low level) is provided for immediate termination of the output pulse or to prevent output pulses when power is turned on. An unused RESET input should be tied to VDD.
Retriggerable/resettable capability
Trigger and reset propagation delays independent of RX, CX
Triggering from leading or trailing edge
Separate resets
Wide range of output-pulse widths
100% Tested for maximum quiescent current at 20V
Standardized, symmetrical output characteristics
Green product and no Sb/Br

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