CD74AC161E - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

CD74AC161E
Manufacturer

TI
ChipWorker Part#

CW44837270
Category

Counter, Counter IC
Package

DIP-16
Description

TEXAS INSTRUMENTS CD74AC161E Binary Synchronous Counter, AC Family, 90MHz, 1 Gate, 4Input, 1.5V to 5.5V, DIP-16
Documentation

Datasheet

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CD74AC161E Specifications

Attribute	Attribute Value

Part Number	CD74AC161E
Manufacturer	TI
ChipWorker Part#	CW44837270
Category	Counter, Counter IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	16 Pin
Case/Package	DIP-16
Supply Voltage (DC)	1.50V ~ 5.50V
Number of Positions	16 Position
Clock Speed	90 MHz
Number of Bits	4 Bit
Voltage Nodes	5.00 V, 3.30 V
Number of Gates	1 Gate
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-55 ℃
Supply Voltage	1.5V ~ 5.5V
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	1.5 V
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Operating Temperature	-55℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15

Product Description

The CD74AC161E is a synchronous presettable Binary Counter with asynchronous reset. It features an internal carry look-ahead for application in high-speed counting. It is fully programmable, that is, it can be preset to any number between 0 and 9 or 15. Presetting is synchronous, therefore, setting up a low level at the load input disables the counter and causes the outputs to agree with the setup data after the next clock pulse, regardless of the levels of the enable inputs. The clear function is asynchronous. A low level at the clear (CLR\\) input sets all four of the flip-flop outputs low, regardless of the levels of the CLK, LOAD\ or enable inputs. The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional gating. Instrumental in accomplishing this function are ENP, ENT and a ripple-carry output (RCO). Both ENP and ENT must be high to count and ENT is fed forward to enable RCO.
Internal look-ahead for fast counting
Carry output for n-bit cascading
Synchronous counting
Synchronously programmable
SCR-latchup-resistant CMOS process and circuit design

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