CD74HC123PW - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

CD74HC123PW
Manufacturer

TI
ChipWorker Part#

CW5061159
Category

Flip Flop IC
Package

TSSOP-16
Description

TEXAS INSTRUMENTS CD74HC123PW Monostable Multivibrator, 74HC123, 25ns, 5.2mA, 2V to 6V, TSSOP-16
Documentation

Datasheet

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CD74HC123PW Specifications

Attribute	Attribute Value

Part Number	CD74HC123PW
Manufacturer	TI
ChipWorker Part#	CW5061159
Category	Flip Flop IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	16 Pin
Case/Package	TSSOP-16
Supply Voltage (DC)	2.00V ~ 6.00V
Output Current	5.2 mA
Number of Positions	16 Position
Number of Bits	2 Bit
Voltage Nodes	2.00 V, 4.50 V, 6.00 V
Rise Time	400 ns
Fall Time	400 ns
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-55 ℃
Supply Voltage	2V ~ 6V
Supply Voltage (Max)	6 V
Supply Voltage (Min)	2 V
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Size-Length	5 mm
Size-Width	4.4 mm
Size-Height	1.15 mm
Operating Temperature	-55℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The CD74HC123PW is a CMOS dual retriggerable Monostable Multivibrator with RESET. It is retriggerable and differ only in that the 123 types can be triggered by a negative to positive RESET pulse, whereas the 423 types do not have this feature. An external resistor (RX) and an external capacitor (CX) control the timing and the accuracy for the circuit. Adjustment of Rx and CX provides a wide range of output pulse widths from the Q and Q\ terminals. Pulse triggering on the A\ and B inputs occur at a particular voltage level and is not related to the rise and fall times of the trigger pulses. Once triggered, the output pulse width may be extended by retriggering inputs A\ and B. The output pulse can be terminated by a low level on the RESET (R) pin. Trailing edge triggering (A\\) and leading edge triggering (B) inputs are provided for triggering from either edge of the input pulse. If either Mono is not used each input on the unused device (A\, B and R\\) must be terminated high or low.
Overriding RESET terminates output pulse
Triggering from the leading or trailing edge
Q and Q\ Buffered outputs
Separate resets
Wide range of output-pulse widths
Schmitt trigger on both A and B inputs
Balanced propagation delay and transition times
Significant power reduction compared to LSTTL logic ICs
Direct LSTTL input logic compatibility
CMOS input compatibility
Green product and no Sb/Br

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