CD74HC147E - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

CD74HC147E
Manufacturer

TI
ChipWorker Part#

CW1943063
Category

Logic Controller, Logic IC
Package

PDIP-16
Description

TEXAS INSTRUMENTS CD74HC147E Priority Encoder, HC Family, 4 Output, 5.2mA, 2V to 6V, DIP-16
Documentation

Datasheet

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CD74HC147E Specifications

Attribute	Attribute Value

Part Number	CD74HC147E
Manufacturer	TI
ChipWorker Part#	CW1943063
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	16 Pin
Case/Package	PDIP-16
Supply Voltage (DC)	2.00V (min)
Number of Outputs	4 Output
Output Current	5.2mA, 5.2mA
Number of Circuits	2 Circuit
Number of Positions	16 Position
Number of Bits	10 Bit
Bandwidth	28.0 MHz
Number of Inputs	9 Input
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-55 ℃
Supply Voltage	2V ~ 6V
Supply Voltage (Max)	6 V
Supply Voltage (Min)	2 V
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Size-Length	19.3 mm
Size-Width	6.35 mm
Size-Height	4.57 mm
Operating Temperature	-55℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The CD74HC147E is a CMOS logic high-speed 10-to-4 line Priority Encoder which is pin-compatible with low power Schottky TTL (LSTTL). The "HC147 9-input priority encoder accept data from nine active LOW inputs (l1 to l9) and provide binary representation on the four active LOW inputs (Y0\ to Y3\\). A priority is assigned to each input so that when two or more inputs are simultaneously active, the input with the highest priority is represented on the output with input line l9 having the highest priority. This encoder provides the 10 to 4-line priority encoding function by use of the implied decimal "zero". The "zero" is encoded when all nine data inputs are HIGH, forcing all four outputs HIGH.
Buffered inputs and outputs
Balanced propagation delay and transition times
Significant power reduction compared to LSTTL logic ICs

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