CD74HC194E - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

CD74HC194E
Manufacturer

TI
ChipWorker Part#

CW5266066
Category

Shift Register IC
Package

DIP-16
Description

Shift Register, HC Family, 74HC194, Universal, 1Element, 4Bit, DIP, 16Pins
Documentation

Datasheet

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CD74HC194E Specifications

Attribute	Attribute Value

Part Number	CD74HC194E
Manufacturer	TI
ChipWorker Part#	CW5266066
Category	Shift Register IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	16 Pin
Case/Package	DIP-16
Frequency	60 MHz
Supply Voltage (DC)	5.00 V, 6.00 V (max)
Number of Outputs	4 Output
Number of Circuits	2 Circuit
Number of Positions	16 Position
Number of Bits	4 Bit
Number of Inputs	6 Input
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-55 ℃
Supply Voltage	2V ~ 6V
Supply Voltage (Max)	6 V
Supply Voltage (Min)	2 V
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Size-Length	19.69 mm
Size-Width	6.6 mm
Size-Height	4.57 mm
Operating Temperature	-55℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Each
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The CD74HC194E is a 4-bit CMOS bidirectional universal Shift Register with an asynchronous master RESET (MR\\). In the parallel mode (S0 and S1 are high), data is loaded into the associated flip-flop and appears at the output after the positive transition of the clock input (CP). During parallel loading serial data flow is inhibited. Shift left and shift right are accomplished synchronously on the positive clock edge with serial data entered at the shift left (DSL) serial input for the shift right mode and at the shift right (DSR) serial input for the shift left mode. Clearing the register is accomplished by a low applied to the master RESET (MR\\) pin.
Shift right, shift left, hold and reset operation modes
Synchronous parallel or serial operation
Asynchronous master reset
Balanced propagation delay and transition times
Significant power reduction compared to LSTTL logic ICs
High noise immunity
Direct LSTTL input logic compatibility
CMOS Input compatibility
10 LSTTL Loads standard outputs
15 LSTTL Loads bus driver outputs

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