CD74HCT174E - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

CD74HCT174E
Manufacturer

TI
ChipWorker Part#

CW8739446
Category

Flip Flop IC
Package

DIP-16
Description

TEXAS INSTRUMENTS CD74HCT174E Flip-Flop, with Reset, Non Inverted, Positive Edge, 74HCT174, D, 17ns, 25MHz, 4mA, DIP
Documentation

Datasheet

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CD74HCT174E Specifications

Attribute	Attribute Value

Part Number	CD74HCT174E
Manufacturer	TI
ChipWorker Part#	CW8739446
Category	Flip Flop IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	16 Pin
Case/Package	DIP-16
Frequency	25 MHz
Supply Voltage (DC)	5.00 V, 5.50 V (max)
Number of Outputs	6 Output
Output Current	4 mA
Number of Circuits	7 Circuit
Number of Channels	6 Channel
Number of Positions	16 Position
Clock Speed	25 MHz
Number of Bits	6 Bit
Polarity	Non-Inverting
Number of Gates	6 Gate
Input Capacitance	10 pF
Number of Inputs	6 Input
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-55 ℃
Supply Voltage	4.5V ~ 5.5V
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	4.5 V
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Size-Length	19.3 mm
Size-Width	6.35 mm
Size-Height	4.57 mm
Operating Temperature	-55℃ ~ 125℃ (TA)
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The CD74HCT174E is a hex high speed CMOS edge triggered D-type Flip-flop with reset. It possess low power and speeds comparable to low power Schottky TTL circuits. It contains six master-slave flip-flops with a common clock and common reset. Data on the D input having the specified setup and hold times is transferred to the Q output on the low to high transition of the CLOCK input. The MR\ input, when low, sets all outputs to a low state. Each output can drive ten low power Schottky TTL equivalent loads. The HCT174 is functional as well as, pin compatible to the LS174.
Buffered positive edge triggered clock
Asynchronous common reset
Balanced propagation delay and transition times
Significant power reduction compared to LSTTL logic ICs
High noise immunity
Direct LSTTL input logic compatibility
CMOS input compatibility
10 LSTTL Load standard outputs
15 LSTTL Load bus driver outputs

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