DS90LV019TM - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

DS90LV019TM
Manufacturer

TI
ChipWorker Part#

CW47532400
Category

LVDS, M-LVDS, ECL, CML IC
Package

SOIC-14
Description

LVDS Driver/Receiver 100Mbps 0.45V 14Pin SOIC Tube
Documentation

Datasheet

DS90LV019TM Global Supplier

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DS90LV019TM Specifications

Attribute	Attribute Value

Part Number	DS90LV019TM
Manufacturer	TI
ChipWorker Part#	CW47532400
Category	LVDS, M-LVDS, ECL, CML IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	14 Pin
Case/Package	SOIC-14
Supply Voltage (DC)	3.30 V, 5.00 V
Supply Current	12.0 mA
Number of Channels	2 Channel
Number of Positions	14 Position
Power Dissipation	960 mW
Data Rate	100 Mbps
Power Consumption	45.0 W
Output Voltage (Max)	450 mV
Input Current (Min)	15 μA
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Power Dissipation (Max)	960 mW
Supply Voltage	3V ~ 5.5V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	3 V
	expand all
Size-Length	8.64 mm
Size-Width	3.91 mm
Size-Height	1.45 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Each
RoHS	Non-Compliant
Lead-Free Status	Contains Lead
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	5A991.b.1

Product Description

The DS90LV019TM is a Driver/Receiver designed specifically for the high speed low power point-to-point interconnect applications. The device operates from a single 3.3 or 5V power supply and includes one differential line driver and one receiver. It features an independent driver and receiver with TTL/CMOS compatibility (DIN and ROUT). The logic interface provides maximum flexibility as 4 separate lines are provided (DIN, DE, RE# and ROUT). The device also features a flow-through pin-out which allows easy PCB routing for short stubs between its pins and the connector. The driver has 3.5mA output loop current. The driver translates between TTL levels (single-ended) to low voltage differential signalling levels. This allows for high speed operation, while consuming minimal power with reduced EMI. In addition, the differential signalling provides common-mode noise rejection.
LVDS Signalling
Low power CMOS design
Balanced output impedance
Glitch free power up/down (driver disabled)
High signalling rate capacity (above 100Mbps)
Ultra low power dissipation
±1V Common-mode range
±100mV Receiver sensitivity
Flow-through pin-out
Industrial temperature range operation
Green product and no Sb/Br

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