HCPL0600 - Fairchild

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

HCPL0600
Manufacturer

Fairchild
ChipWorker Part#

CW5844759
Category

Optocoupler, Optoisolator
Package

SOIC-8
Description

FAIRCHILD SEMICONDUCTOR HCPL0600 Optocoupler, Digital Output, 1Channel, 3.75kV, 10Mbps, SOIC, 8Pins
Documentation

Datasheet

HCPL0600 Global Supplier

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HCPL0600 Specifications

Attribute	Attribute Value

Part Number	HCPL0600
Manufacturer	Fairchild
ChipWorker Part#	CW5844759
Category	Optocoupler, Optoisolator
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	8 Pin
Case/Package	SOIC-8
Supply Voltage (DC)	5.50 V
Rise/Fall Time	50ns, 12ns
Input Voltage (DC)	1.80V (max)
Output Voltage	7 V
Output Current	50 mA
Number of Channels	1 Channel
Number of Positions	8 Position
Forward Voltage	1.75V (Max)
Input Current	15 mA
Power Dissipation	85 mW
Data Rate	10.0 Mbps
Rise Time	50 ns
Isolation Voltage	3750 Vrms
Forward Current	50 mA
Input Voltage (Max)	5.5 V
Input Current (Min)	15 mA
Reverse Breakdown Voltage	5 V
Maximum Forward Voltage (Max)	1.75 V
Forward Current (Max)	50 mA
Fall Time	12 ns
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Power Dissipation (Max)	85 mW
Supply Voltage	4.5V ~ 5.5V
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Size-Length	5.13 mm
Size-Width	4.16 mm
Size-Height	3.43 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Each
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The HCPL0600 is a 1-channel 10Mbps high-speed Logic Gate Optocoupler consists of an AlGaAS LED, optically coupled to a very high-speed integrated photo-detector logic gate with a strobable output (single channel devices). This output features an open collector, thereby permitting wired OR outputs. The HCPL0600 output consists of bipolar transistors on a bipolar process while the HCPL0637, HCPL0638 and HCPL0639 output consists of bipolar transistors on a CMOS process for reduced power consumption. The coupled parameters are guaranteed over wide temperature range. An internal noise shield provides superior common mode rejection.
Superior CMR
Fan-out of 8 over -40 to +85°C temperature range
Logic gate output
Strobable output (single channel devices)
Wired OR-open collector

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