IR2153DPBF - Infineon

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

IR2153DPBF
Manufacturer

Infineon
ChipWorker Part#

CW3762630
Category

FET Driver
Package

DIP-8
Description

MOSFET DRVR 600V 0.4A 2Out Hi/Lo Side Half Brdg Inv/Non-Inv 8Pin PDIP T/R
Documentation

Datasheet

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IR2153DPBF Specifications

Attribute	Attribute Value

Part Number	IR2153DPBF
Manufacturer	Infineon
ChipWorker Part#	CW3762630
Category	FET Driver
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	8 Pin
Case/Package	DIP-8
Supply Voltage (DC)	10.0V (min)
Rise/Fall Time	80ns, 45ns
Number of Outputs	2 Output
Output Voltage	10V ~ 20V
Output Current	400 mA
Number of Channels	2 Channel
Number of Positions	8 Position
Power Dissipation	1000 mW
Rise Time	150 ns
Fall Time	100 ns
Fall Time (Max)	100 ns
Fall Time (Max)	150 ns
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-40 ℃
Power Dissipation (Max)	1000 mW
Supply Voltage	10V ~ 15.6V
Supply Voltage (Max)	20 V
Supply Voltage (Min)	10 V
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Size-Length	10.92 mm
Size-Width	7.11 mm
Size-Height	5.33 mm
Operating Temperature	-40℃ ~ 125℃ (TJ)
Product Lifecycle Status	Not For New Designs
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free

Product Description

The IR2153DPBF is a self-oscillating Half-bridge Gate Driver IC incorporates a high voltage half-bridge gate driver with a front end oscillator similar to the industry standard CMOS 555 timer. The IC provides more functionality and is easier to use. A shutdown feature has been designed into the CT pin, so that both gate driver outputs can be disabled using a low voltage control signal. In addition the gate driver output pulse widths are the same once the rising under-voltage lockout threshold on VCC has been reached, resulting in a more stable profile of frequency vs. time at start-up. Noise immunity has been improved significantly, both by lowering the peak DI/DT of the gate driver and by increasing the under-voltage lockout hysteresis to 1V.
True micro power start-up
Tighter initial dead-time control
Low temperature coefficient dead time
Shutdown features on CT pin
Lower power level-shifting circuit
Constant LO, HO pulse widths at start-up
Low side output in phase with RT
Excellent latch immunity on all inputs and outputs
Finally special attention has been paid to maximizing the latch immunity of the device and providing comprehensive ESD protection all pins.

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