IRS2011SPBF - Infineon

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

IRS2011SPBF
Manufacturer

Infineon
ChipWorker Part#

CW8360840
Category

FET Driver
Package

SOIC-8
Description

MOSFET DRVR 200V 1A 2Out Hi/Lo Side Non-Inv 8Pin SOIC Tube
Documentation

Datasheet

IRS2011SPBF Global Supplier

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IRS2011SPBF Specifications

Attribute	Attribute Value

Part Number	IRS2011SPBF
Manufacturer	Infineon
ChipWorker Part#	CW8360840
Category	FET Driver
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	8 Pin
Case/Package	SOIC-8
Supply Voltage (DC)	10.0V (min)
Power Rating	625 mW
Rise/Fall Time	25ns, 15ns
Number of Outputs	2 Output
Output Voltage	200 V
Output Current	1 A
Number of Channels	2 Channel
Number of Positions	8 Position
Power Dissipation	625 mW
Quiescent Current	200 µA
Rise Time	25 ns
Fall Time	15 ns
Fall Time (Max)	35 ns
Fall Time (Max)	40 ns
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-40 ℃
Power Dissipation (Max)	625 mW
Supply Voltage	10V ~ 20V
Supply Voltage (Max)	20 V
Supply Voltage (Min)	10 V
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Size-Length	5 mm
Size-Width	4 mm
Size-Height	1.5 mm
Operating Temperature	-40℃ ~ 150℃ (TJ)
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance Edition	2015/12/17
ECCN Code	EAR99

Product Description

The IRS2011SPBF is a high power high speed power MOSFET high and low Side Driver with independent high and low-side referenced output channels. Logic inputs are compatible with standard CMOS or LSTTL output, down to 3.3V logic. The output driver features a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use in high frequency applications. The floating channel can be used to drive an N-channel power MOSFET in the high-side configuration which operates up to 200V. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction.
Floating channel designed for bootstrap operation
Tolerant to negative transient voltage (dV/dt immune)
Independent low and high-side channels
Input logic HIN/LIN active high
Under-voltage lockout for both channels
3.3 and 5V Logic compatible
CMOS Schmitt-triggered inputs with pull-down
Matched propagation delay for both channels

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