KSZ8001L - Microchip

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

KSZ8001L
Manufacturer

Microchip
ChipWorker Part#

CW13000470
Category

Ethernet Controller IC, Ethernet Controller
Package

LQFP-48
Description

PHY 1CH 10Mbps/100Mbps 1.8V/3.3V 48Pin LQFP Tray
Documentation

Datasheet

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KSZ8001L Specifications

Attribute	Attribute Value

Part Number	KSZ8001L
Manufacturer	Microchip
ChipWorker Part#	CW13000470
Category	Ethernet Controller IC, Ethernet Controller
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	48 Pin
Case/Package	LQFP-48
Supply Current	52 mA
Number of Channels	1 Channel
Number of Positions	48 Position
Power Dissipation	250 mW
Data Rate	100 Mbps
Operating Temperature (Max)	70 ℃
Operating Temperature (Min)	0 ℃
Power Dissipation (Max)	250 mW
Supply Voltage	1.8V, 3.3V
Supply Voltage (Max)	1.89 V
Supply Voltage (Min)	1.71 V
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Size-Length	7 mm
Size-Width	7 mm
Size-Height	1.4 mm
Operating Temperature	0℃ ~ 70℃
Product Lifecycle Status	Unknown
Packaging	Tray
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance Edition	2014/06/16
ECCN Code	5A991.B

Product Description

The KSZ8001L is an Integrated 9-port 10/100 Switch with PHY and frame buffer. This device runs in two modes. The first mode is an eight port integrated switch and the second is as a nine port switch with the ninth port available through an MII (Media Independent Interface). Useful configurations include a stand-alone eight port switch as well as an eight port switch with a routing element connected to the extra MII port. The additional port is also useful for a public network interfacing. The KS8999 is designed to reside in an unmanaged design not requiring processor intervention. This is achieved through I/O strapping or EEPROM programming at system reset time. On the media side, it supports 10BaseT, 100BaseTX and 100BaseFX as specified by the IEEE 802.3 committee. Physical signal transmission and reception are enhanced through use of analog circuitry that makes the design more efficient and allows for lower power consumption and smaller chip die size.
128kB of SRAM on chip for frame buffering
2.0Gbps High performance memory bandwidth
Wire speed reception and transmission
Integrated address look-up engine, supports 1K absolute MAC addresses
Automatic address learning, address aging and address migration
Supports 802.1p priority and port based priority
Supports port based VLAN
Supports 1536byte frame for VLAN tag
Supports DiffServ priority, 802.1p based priority or port based priority broadcast storm protection
Proven transceiver technology for UTP and fibre operation
Supports for UTP or fibre on all 8-ports
Indicators for link, activity, full/half-duplex and speed
Full duplex IEEE 802.3x flow control
Half-duplex back pressure flow control
Supports MDI/MDI-X auto crossover

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- Carefully tested and packaged by ChipWorker
- Vacuum packed
- Anti-static packaging
- Anti-vibration foam
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- Decapsulation control
- X-ray inspection
- XRF inspection
- Electrical testing
- Surface testing

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