LMP2022MA - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

LMP2022MA
Manufacturer

TI
ChipWorker Part#

CW45919578
Category

Operational Amplifier, OP Amp IC
Package

SOIC
Description

TEXAS INSTRUMENTS LMP2022MA Operational Amplifier, Dual, 2 Amplifier, 5MHz, 2.6V/µs, 2.2V to 5.5V, SOIC, 8Pins
Documentation

Datasheet

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LMP2022MA Specifications

Attribute	Attribute Value

Part Number	LMP2022MA
Manufacturer	TI
ChipWorker Part#	CW45919578
Category	Operational Amplifier, OP Amp IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	8 Pin
Case/Package	SOIC
Output Current	50.0 mA
Number of Channels	2 Channel
Number of Positions	8 Position
Bandwidth	5 MHz
Slew Rate	2.60 V/μs
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	2.2V ~ 5.5V
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Product Lifecycle Status	Active
Packaging	Each
RoHS	RoHS Compliant
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15

Product Description

The LMP2022MA is a zero drift low noise EMI hardened Operational Amplifier offering ultra-low input offset-voltage, near zero input offset voltage drift, very low input voltage noise and very high open loop gain. This op-amp is part of the LMP precision family and is ideal for instrumentation and sensor interfaces. The LMP202x has only 0.004µV/°C of input offset voltage drift and 0.4µV of input offset voltage. These attributes provide great precision in high accuracy applications. The proprietary continuous auto zero correction circuitry ensures impressive CMRR and PSRR, removes the 1/f noise component and eliminates the need for calibration in many circuits. With only 260nVPP of input voltage noise and no 1/f noise component, the op-amp suitable for low frequency applications such as industrial precision weigh scales. The extremely high open loop gain of 160dB drastically reduces gain error in high gain applications.
-0.4µV Typical input offset voltage
±5µV Maximum input offset voltage
-0.004µV/°C Typical input offset voltage drift
±0.02µV/°C Maximum input offset voltage drift
11nV/√Hz Input voltage noise
160dB Open loop gain
139dB CMRR
130dB PSRR
±25pA Input bias current
This device has limited built-in ESD protection, leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

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