LPC11U68JBD48E - NXP

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

LPC11U68JBD48E
Manufacturer

NXP
ChipWorker Part#

CW4373638
Category

Microcontroller, MCU IC
Package

LQFP-48
Description

ARM Microcontroller, LPC1100 ARM Cortex-M0+ Microcontrollers, 32Bit, 50MHz, 256KB, 36KB, 48Pins
Documentation

Datasheet

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LPC11U68JBD48E Specifications

Attribute	Attribute Value

Part Number	LPC11U68JBD48E
Manufacturer	NXP
ChipWorker Part#	CW4373638
Category	Microcontroller, MCU IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	48 Pin
Case/Package	LQFP-48
Number of Positions	48 Position
Clock Speed	50.0 MHz
RAM Memory Size	36 KB
Number of Bits	32 Bit
Power Dissipation	1500 mW
Number of ADCs	1 ADC
Number of Inputs and Outputs	34 Input IO
Operating Temperature (Max)	105 ℃
Operating Temperature (Min)	40 ℃
Power Dissipation (Max)	1500 mW
Supply Voltage	2.4V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	2.4 V
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Operating Temperature	-40℃ ~ 105℃
Product Lifecycle Status	Active
Packaging	Cut Tape (CT)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2014/12/17

Product Description

The LPC11U68JBD48E is a 32-bit ARM Cortex-M0+ Microcontroller Unit builds on the ease-of-use and design flexibility with enhanced features, including a more energy-efficient ARM® Cortex™-M0+ core, significantly more flash and SRAM and more serial communications, a new 2-Msps ADC and more versatile timers. It includes a USB device controller certified by the USB implementers forum (USB-IF) and gives designers access to all the USB software, tools and shortcuts they need to simplify development and shrink time to market. Embedding the USB drivers in ROM cuts design time and reduces application program footprint while increasing reliability and an on-chip PHY reduces the solution BOM and design complexity.
ARM Cortex-M0 built-in nested vectored interrupt controller
Serial wire debug and JTAG boundary scan modes supported
System tick timer
Pin interrupt and pattern match engine using eight selectable GPIO pins
Windowed watchdog timer
Two SSP controllers with DMA support
PLL allows CPU operation up to the maximum CPU rate without the need for a high-frequency crystal
Integrated PMU (power management unit)

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