LPC1765FBD100 - NXP

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

LPC1765FBD100
Manufacturer

NXP
ChipWorker Part#

CW66181496
Category

32-Bit Microcontroller IC
Package

LQFP
Description

NXP LPC1765FBD100 32Bit Microcontroller, ARM Cortex-M3, 100MHz, 256KB, 64KB, 100Pins, LQFP
Documentation

Datasheet

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LPC1765FBD100 Specifications

Attribute	Attribute Value

Part Number	LPC1765FBD100
Manufacturer	NXP
ChipWorker Part#	CW66181496
Category	32-Bit Microcontroller IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	100 Pin
Case/Package	LQFP
Supply Voltage (DC)	2.40V (min)
Number of Positions	100 Position
Clock Speed	100 MHz
RAM Memory Size	64 KB
Number of Bits	32 Bit
FLASH Memory Size	262144 B
Number of Inputs and Outputs	70 Input IO
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	2.4 V
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Operating Temperature	-40℃ ~ 85℃ (TA)
Product Lifecycle Status	Unknown
Packaging	Each
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/12/17

Product Description

The LPC1765FBD100 is a 32-bit Microcontroller based on ARM Cortex-M3 core with RISC architecture operates at a maximum frequency of 100MHz. The ARM Cortex-M3 is a next generation core that offers system enhancements such as enhanced debug features and a higher level of support block integration. The ARM Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals. The ARM Cortex-M3 CPU also includes an internal prefetch unit that supports speculative branching. The device incorporates 256kB internal flash, 64kB internal RAM, USB Device/Host/OTG interface, 8-channel general purpose DMA controller, 8-channel 12-bit A/D converter, 10-bit D/A converter, motor control PWM, quadrature encoder interface, four general purpose timers, 6-output general purpose PWM, ultra-low power real-time clock (RTC) with separate battery supply and 70 general-purpose I/O pins.
ARM Cortex-M3 built-in nested vectored interrupt controller (NVIC)
In-system programming (ISP) and In-application programming (IAP)
Multilayer AHB matrix interconnect
Split APB bus
Standard JTAG debug interface for compatibility
Emulation trace module enables non-intrusive, high-speed real-time tracing of instruction execution
Integrated PMU (power management unit)
Four reduced power modes - Sleep, deep-sleep, power-down and deep power-down
Four external interrupt inputs configurable as edge/level sensitive
Non-maskable Interrupt (NMI) input
The wake-up interrupt controller (WIC)
Brownout detect with separate threshold for interrupt and forced reset
Power-on reset (POR)
Crystal oscillator with an operating range of 1MHz to 25MHz
4MHz Internal RC oscillator trimmed to 1 % accuracy
PLL allows CPU operation up to the maximum CPU rate
USB PLL for added flexibility
Code read protection (CRP) with different security levels
Unique device serial number for identification purposes

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