M74VHC1GT14DFT2G - ON Semiconductor

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

M74VHC1GT14DFT2G
Manufacturer

ON Semiconductor
ChipWorker Part#

CW4088114
Category

Logic Control, Logic Gate IC
Package

SC-70-5
Description

Inverter Schmitt Trigger 1Element CMOS 5Pin SC-70 T/R
Documentation

Datasheet

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M74VHC1GT14DFT2G Specifications

Attribute	Attribute Value

Part Number	M74VHC1GT14DFT2G
Manufacturer	ON Semiconductor
ChipWorker Part#	CW4088114
Category	Logic Control, Logic Gate IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	5 Pin
Case/Package	SC-70-5
Supply Voltage (DC)	3.00V (min)
Halogen Free Status	Halogen Free
Number of Circuits	1 Circuit
Number of Positions	5 Position
Number of Gates	1 Gate
Number of Inputs	1 Input
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-55 ℃
Supply Voltage	3V ~ 5.5V
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	3 V
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Size-Length	2.2 mm
Size-Width	1.35 mm
Size-Height	1 mm
Operating Temperature	-55℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/12/17
ECCN Code	EAR99

Product Description

The M74VHC1GT14DFT2G is a single Gate CMOS Schmitt-trigger Inverter fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent bipolar schottky TTL while maintaining CMOS low power dissipation. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The device input is compatible with TTL-type input thresholds and the output has a full 5V CMOS level output swing. The input protection circuitry on this device allows overvoltage tolerance on the input, allowing the device to be used as a logic-level translator from 3V CMOS logic to 5V CMOS logic or from 1.8V CMOS logic to 3V CMOS Logic while operating at the high-voltage power supply. The device input structure provides protection when voltages up to 7V are applied, regardless of the supply voltage. This allows the device to be used to interface 5V circuits to 3V circuits.
4.5ns Propagation delay (tPD)
1µA Low power dissipation (ICC)
TTL compatible inputs
CMOS compatible outputs
Power down protection provided on inputs and outputs
Balanced propagation delays
Pin and function compatible with other standard logic families
Chip complexity - 100 FETs, 25 equivalent gates

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