MC100EPT21DT - ON Semiconductor

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

MC100EPT21DT
Manufacturer

ON Semiconductor
ChipWorker Part#

CW151937058
Category

Voltage Level Translator IC
Package

TSSOP-8
Description

Translator CML/LVDS/LVPECL to LVCMOS/LVTTL 8Pin TSSOP Rail
Documentation

Datasheet

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MC100EPT21DT Specifications

Attribute	Attribute Value

Part Number	MC100EPT21DT
Manufacturer	ON Semiconductor
ChipWorker Part#	CW151937058
Category	Voltage Level Translator IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	8 Pin
Case/Package	TSSOP-8
Supply Voltage (DC)	3.30 V, 3.60 V (max)
Number of Channels	1 Channel
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	3 V
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Product Lifecycle Status	Unknown
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
ECCN Code	EAR99

Product Description

The MC100EPT21 is a Differential LVPECL/LVDS/CML to LVTTL/LVCMOS translator. Because LVPECL (Positive ECL), LVDS, and positive CML input levels and LVTTL/LVCMOS output levels are used, only +3.3 V and ground are required. The small outline 8−lead SOIC package makes the EPT21 ideal for applications which require the translation of a clock or data signal.
The VBB output allows this EPT21 to be cap coupled in either single−ended or differential input mode. When single−ended cap coupled, VBB output is tied to the D input and D is driven for a non−inverting buffer, or VBB output is tied to the D input and D is driven for an inverting buffer. When cap coupled differentially, VBB output is connected through a resistor to each input pin. If used, the VBB pin should be bypassed to VCC via a 0.01 μF capacitor. For additional information see AND8020/D. For a single−ended direct connection use an external voltage reference source such as a resistor divider. Do not use VBB for a single−ended direct connection or port to another device.
Features
• 1.4 ns Typical Propagation Delay
• Maximum Frequency > 275 MHz Typical
• LVPECL/LVDS/CML Inputs, LVTTL/LVCMOS Outputs
• 24 mA TTL outputs
• Operating Range: VCC = 3.0 V to 3.6 V with GND = 0 V
• The 100 Series Contains Temperature Compensation
• VBB Output
• Pb−Free Packages are Available

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