MC100EPT21DTG - ON Semiconductor

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

MC100EPT21DTG
Manufacturer

ON Semiconductor
ChipWorker Part#

CW6893404
Category

Voltage Level Translator IC
Package

TSSOP-8
Description

ON SEMICONDUCTOR MC100EPT21DTG Differential LVPECL-to-LVTTL Translator, 2Input, 24mA, 1.4ns, 3V to 3.6V, TSSOP-8
Documentation

Datasheet

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MC100EPT21DTG Specifications

Attribute	Attribute Value

Part Number	MC100EPT21DTG
Manufacturer	ON Semiconductor
ChipWorker Part#	CW6893404
Category	Voltage Level Translator IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	8 Pin
Case/Package	TSSOP-8
Supply Voltage (DC)	3.30 V
Halogen Free Status	Halogen Free
Output Current	24 mA
Supply Current	18.0 mA
Number of Circuits	1 Circuit
Number of Channels	1 Channel
Number of Positions	8 Position
Number of Bits	1 Bit
Number of Gates	1 Gate
Rise Time	600 ps
Number of Inputs	2 Input
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Number of Output Channels	1 Channel
Supply Voltage	3V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	3 V
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Size-Length	3.1 mm
Size-Width	3.1 mm
Size-Height	0.95 mm
Operating Temperature	-40℃ ~ 85℃ (TA)
Product Lifecycle Status	Active
Packaging	Each
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/12/17
ECCN Code	EAR99

Product Description

The MC100EPT21DTG is a 3.3V Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator ideal for applications which requires the translation of a clock or data signal. Because LVPECL (positive ECL), LVDS and positive CML input levels and LVTTL/LVCMOS output levels are used, only 3.3V and ground are required. The VBB output allows this EPT21 to be cap coupled in either single-ended or differential input mode. When single-ended cap coupled, VBB output is tied to the D input and D is driven for a non-inverting buffer or VBB output is tied to the D input and D is driven for an inverting buffer. When cap coupled differentially, VBB output is connected through a resistor to each input pin. If used, the VBB pin should be bypassed to VCC via a 0.01F capacitor. For a single-ended direct connection use an external voltage reference source such as a resistor divider. Do not use VBB for a single-ended direct connection or port to another device.
LVPECL/LVDS/CML Inputs
LVTTL/LVCMOS Outputs
24mA TTL outputs
Contains temperature compensation
>275MHz Typical maximum frequency

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