MC100LVEP14DTG - ON Semiconductor

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

MC100LVEP14DTG
Manufacturer

ON Semiconductor
ChipWorker Part#

CW11396524
Category

Clock Buffer, Driver, PLL IC
Package

TSSOP-20
Description

Clock Multiplexer 5Out 2IN 1:5 20Pin TSSOP Tube
Documentation

Datasheet

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MC100LVEP14DTG Specifications

Attribute	Attribute Value

Part Number	MC100LVEP14DTG
Manufacturer	ON Semiconductor
ChipWorker Part#	CW11396524
Category	Clock Buffer, Driver, PLL IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	20 Pin
Case/Package	TSSOP-20
Frequency	2 GHz
Supply Voltage (DC)	2.38V (min)
Current Rating	96.0 A
Halogen Free Status	Halogen Free
Number of Outputs	5 Output
Supply Current	60 mA
Number of Circuits	1 Circuit
Number of Channels	6 Channel
Number of Positions	20 Position
Clock Speed	2.00 GHz
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	2.375V ~ 3.8V
Supply Voltage (Max)	3.8 V
Supply Voltage (Min)	2.375 V
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Size-Length	6.6 mm
Size-Width	4.5 mm
Size-Height	1.05 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/12/17
ECCN Code	EAR99

Product Description

Description
The MC100LVEP14 is a low skew 1−to−5 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The ECL/PECL input signals can be either differential or single−ended (if the VBB output is used). HSTL inputs can be used when the LVEP14 is operating under PECL conditions. The LVEP14 specifically guarantees low output−to−output skew. Optimal design, layout, and processing minimize skew within a device and from device to device.
To ensure that the tight skew specification is realized, both sides of any differential output need to be terminated identically into 50 Ω even if only one output is being used. If an output pair is unused, both outputs may be left open (unterminated) without affecting skew.
Features
• 100 ps Device−to−Device Skew
• 25 ps Within Device Skew
• 400 ps Typical Propagation Delay
• Maximum Frequency > 2 GHz Typical
• The 100 Series Contains Temperature Compensation
• PECL and HSTL Mode:
VCC = 2.375 V to 3.8 V with VEE = 0 V
• NECL Mode:
VCC = 0 V with VEE = −2.375 V to −3.8 V
• LVDS Input Compatible
• Open Input Default State
• These Devices are Pb−Free and are RoHS Compliant

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