MM74HCT245WM - Fairchild

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

MM74HCT245WM
Manufacturer

Fairchild
ChipWorker Part#

CW39080637
Category

Logic Controller, Logic IC
Package

SOIC-20
Description

FAIRCHILD SEMICONDUCTOR MM74HCT245WM Bus Transceiver, 74HCT245, 4.5V to 5.5V, SOIC-20
Documentation

Datasheet

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MM74HCT245WM Specifications

Attribute	Attribute Value

Part Number	MM74HCT245WM
Manufacturer	Fairchild
ChipWorker Part#	CW39080637
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	20 Pin
Case/Package	SOIC-20
Supply Voltage (DC)	4.50V (min)
Number of Circuits	8 Circuit
Number of Channels	8 Channel
Number of Positions	20 Position
Number of Bits	8 Bit
Power Dissipation	500 mW
Number of Gates	8 Gate
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Power Dissipation (Max)	500 mW
Supply Voltage	4.5V ~ 5.5V
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	4.5 V
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Size-Length	13 mm
Size-Width	7.6 mm
Size-Height	2.35 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The MM74HCT245WM is an octal 3-state bidirectional Buffer Transceiver utilizes advanced silicon-gate CMOS technology and is intended for two-way asynchronous communication between data buses. It has high drive current outputs which enable high speed operation even when driving large bus capacitances. This circuit possesses the low power consumption of CMOS circuitry, yet has speeds comparable to low power Schottky TTL circuits. This device is TTL input compatible and can drive up to 15 LS-TTL loads and all inputs are protected from damage due to static discharge by diodes to VCC and ground. It has one active low enable input and direction control. When the DIR input is HIGH, data flows from the A inputs to the B outputs. When DIR is LOW data flows from B to A. This device is intended to interface between TTL and NMOS components and standard CMOS devices. This part is also plug-in replacements for LS-TTL devices and can be used to reduce power consumption in existing designs.
3-state Outputs for connection to system buses
High speed - 16ns typical propagation delay
Low power - 14ns

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