PCA9517ADP - NXP

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

PCA9517ADP
Manufacturer

NXP
ChipWorker Part#

CW121934696
Category

Logic Controller, Logic IC
Package

TSSOP-8
Description

NXP PCA9517ADP Bus Repeater, 900mV to 5.5V, 2.7V to 5.5V, TSSOP-8
Documentation

Datasheet

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PCA9517ADP Specifications

Attribute	Attribute Value

Part Number	PCA9517ADP
Manufacturer	NXP
ChipWorker Part#	CW121934696
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	8 Pin
Case/Package	TSSOP-8
Supply Voltage (DC)	900mV (min)
Number of Positions	8 Position
Power Dissipation	100 mW
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	0.9 V
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Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Unknown
Packaging	Each
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/12/17

Product Description

The PCA9517ADP is a CMOS Integrated Circuit that provides level shifting between low voltage (down to 0.9V) and higher voltage (2.7V to 5.5V) I²C-bus or SMBus applications. While retaining all the operating modes and features of the I²C-bus system during the level shifts, it also permits extension of the I²C-bus by providing bidirectional buffering for both the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400pF. Using the PCA9517A enables the system designer to isolate two halves of a bus for both voltage and capacitance. The SDA and SCL pins are overvoltage tolerant and are high-impedance when the PCA9517A is unpowered. The 2.7V to 5.5V bus port B drivers behave much like the drivers on the PCA9515A device, while the adjustable voltage bus port A drivers drive more current and eliminate the static offset voltage. This results in a low on the port B translating into a nearly 0V low on the port A which accommodates smaller voltage swings of lower voltage logic.
2-channel Bidirectional buffer isolates capacitance and allows 400pF on either side of device
I²C-bus and SMBus compatible
Active high repeater enable input
Open-drain input/outputs
Lock-up free operation
Supports arbitration and clock stretching across repeater
Accommodates Standard-mode and Fast-mode I²C-bus devices and multiple masters
Powered-off high-impedance I²C-bus pins
5V tolerant I²C-bus and enable pins
Latch-up testing is done to JEDEC standard JESD78 that exceeds 100mA
ESD sensitive device, take proper precaution while handling the device.

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