PCA9617ATPZ - NXP

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

PCA9617ATPZ
Manufacturer

NXP
ChipWorker Part#

CW19387034
Category

Voltage Level Translator IC
Package

HWSON-8
Description

I2C Repeater 3.3V/5V 8Pin HWSON EP T/R
Documentation

Datasheet

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PCA9617ATPZ Specifications

Attribute	Attribute Value

Part Number	PCA9617ATPZ
Manufacturer	NXP
ChipWorker Part#	CW19387034
Category	Voltage Level Translator IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	8 Pin
Case/Package	HWSON-8
Supply Voltage (DC)	2.20V (min)
Supply Current	50 µA
Number of Channels	1 Channel
Number of Positions	8 Position
Power Dissipation	100 mW
Input Capacitance	7 pF
Number of Inputs	2 Input
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Power Dissipation (Max)	100 mW
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	2.2 V
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Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Cut Tape (CT)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/12/17
ECCN Code	EAR99

Product Description

The PCA9617ATPZ is a CMOS level translating Fm+ I²C-bus Repeater provides level shifting between low voltage (0.8 to 5.5V) and higher voltage (2.2 to 5.5V) fast-mode plus (Fm+) I²C-bus or SMBus applications. While retaining all the operating modes and features of the I²C-bus system during the level shifts, it also permits extension of the I²C-bus by providing bidirectional buffering for both the data (SDA) and the clock (SCL) lines, thus enabling two buses of 540pF at 1MHz or up to 4000pF at lower speeds. Using the PCA9617A enables the system designer to isolate two halves of a bus for both voltage and capacitance. The SDA and SCL pins are overvoltage tolerant and are high-impedance when the PCA9617A is unpowered. The 2.2 to 5.5V bus port B drivers have the static level offset, while the adjustable voltage bus port A drivers eliminate the static offset voltage. This results in a low on the port B translating into a nearly 0V low on the port A.
Voltage level translation
Footprint and functional replacement for PCA9517A at fast-mode speeds
Active high repeater enable input referenced to VCC(B)
Open-drain input/outputs
Latching free operation
Supports arbitration and clock stretching across the repeater
Powered-OFF high-impedance I²C-bus pins
Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100mA

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