PCA9655EDTR2G - ON Semiconductor

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

PCA9655EDTR2G
Manufacturer

ON Semiconductor
ChipWorker Part#

CW23044444
Category

Interface IC, Interface Controller
Package

TSSOP-24
Description

I2C/SMBus GPIO Expander 100kHz/400kHz/1000kHz 5.5V 24Pin TSSOP T/R
Documentation

Datasheet

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PCA9655EDTR2G Specifications

Attribute	Attribute Value

Part Number	PCA9655EDTR2G
Manufacturer	ON Semiconductor
ChipWorker Part#	CW23044444
Category	Interface IC, Interface Controller
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	24 Pin
Case/Package	TSSOP-24
Supply Voltage (DC)	1.65V (min)
Halogen Free Status	Halogen Free
Output Voltage	5.5 V
Output Current	50 mA
Number of Positions	24 Position
Clock Speed	100 kHz
Power Dissipation	600 mW
Number of Inputs and Outputs	16 Input IO
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-55 ℃
Supply Voltage	1.65V ~ 5.5V
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	1.65 V
Input Voltage	1.65V ~ 5.5V
	expand all
Operating Temperature	-55℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
ECCN Code	EAR99

Product Description

The PCA9655E provides 16 bits of General Purpose parallel Input and Output (GPIO) expansion through the I2C-bus and SMBus. The PCA9655E consists of two 8-bit Configuration (Input or Output selection); Input, Output and Polarity Inversion (active-HIGH) or active-LOW operation) registers. At power on, all IOs default to inputs. Each IO may be configured as either input or output by writing to its corresponding IO configuration bit. The data for each Input or Output is kept in its corresponding Input or Output register. The Polarity Inversion register may be used to invert the Polarity if the read register. All registers can be read by the system master. The PCA9655E provides an open-drain interrupt output which is activated when any input state differs from its corresponding input port register state. The interrupt output is used to indicate to the system master that an input state has changed. The power-on reste sets the registers to their default values and initializes the device state machine. Three hardware pins (AD0, AD1, AD2) are used to configure the I2C-bus slave address of the device. Up to 64 devices are allowed to share the same I2C-bus and SMBus.
Features
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VCC Operating Range: 1.65 V to 5.5 V
SDA Sink Capability: 30 mA
5.5 V Tolerant I/Os
Polarity Inversion Register
Active LOW Interrupt Output
Low Standby Current
Noise Filter on SCL/SDA Inputs
No Glitch on Powerup
Internal Poweron Reset
64 Programmable Slave Addresses Using Three Address Pins
16 I/O Pins Which Default to 16 Inputs
I2C SCL Clock Frequencies Supported:Standard Mode: 100 kHz/Fast Mode: 400 kHz/Fast Mode +: 1 MHz
ESD Performance: 2000 V Human Body Model,200 V Machine Model

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