R0K505210S003BE - Renesas Electronics

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

R0K505210S003BE
Manufacturer

Renesas Electronics
ChipWorker Part#

CW92509650
Category

Microprocessor Primary Platform
Description

Renesas Starter Kit for RX210 Series (B Mask) w/ R5F5210 MCU
Documentation

Datasheet

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R0K505210S003BE Specifications

Attribute	Attribute Value

Part Number	R0K505210S003BE
Manufacturer	Renesas Electronics
ChipWorker Part#	CW92509650
Category	Microprocessor Primary Platform
Documentation	Datasheet
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Product Lifecycle Status	Unknown
Packaging	Bulk
RoHS	Non-Compliant
Lead-Free Status	Lead Free
ECCN Code	EAR99

Product Description

* 32-bit RX CPU core * Max. operating frequency: 50 MHz Capable of 78 DMIPS in operation at 50 MHz * Accumulator handles 64-bit results (for a single instruction)from 32- × 32-bit operations * Multiplication and division unit handles 32- × 32-bit operations (multiplication instructions take one CPU clock cycle) * Fast interrupt * CISC Harvard architecture with 5-stage pipeline * Variable-length instructions, ultra-compact code * On-chip debugging circuit * Low power design and architecture * Operation from a single 1.62-V to 5.5-V supply * 1.62-V operation available (at up to 20 MHz) * Deep software standby mode with RTC remaining usable * Four low power consumption modes * On-chip flash memory for code, no wait states * 50-MHz operation, 20-ns read cycle * No wait states for reading at full CPU speed * 64-K to 1-Mbyte capacities * User code programmable via the SCI * Programmable at 1.62 V * For instructions and operands * On-chip data flash memory * 8 Kbytes(Number of times of reprogramming: 100,000) * Erasing and programming impose no load on the CPU. * On-chip SRAM, no wait states * 12-K to 96-Kbyte size capacities * DMA * DMAC: Incorporates four channels * DTC: Four transfer modes * ELC * Module operation can be initiated by event signals without going through interrupts. * Modules can operate while the CPU is sleeping. * Reset and supply management * Nine types of reset, including the power-on reset (POR) * Low voltage detection (LVD) with voltage settings * Clock functions * Frequency of external clock: Up to 20 MHz * Frequency of the oscillator for sub-clock generation: 32.768kHz * PLL circuit input: 4 MHz to 12.5 MHz * On-chip low- and high-speed oscillators, dedicated on-chip low-speed oscillator for the IWDT * Generation of a dedicated 32.768-kHz clock for the RTC * Clock frequency accuracy measurement circuit (CAC) * Real-time clock * Adjustment functions (30 seconds, leap year, and error) * Year and month display or32-bit second display (binary counter) is selectable * Time capture function * Time capture on event-signal input through external pins * RTC capable of initiating return from deep software standby mode * Independent watchdog timer * 125-kHz on-chip oscillator produces a dedicated clock signal to drive IWDT operation. * Useful functions for IEC60730 compliance * Self-diagnostic and disconnection-detection assistance functions for the A/D converter, clock frequency accuracy measurement circuit, independent watchdog timer, functions to assist in RAM testing, etc. * Up to 15 communications channels * SCI with many useful functions (up to 13 channels)Asynchronous mode, clock synchronous mode, smart card interface * I2C bus interface: Transfer at up to 400 kbps, capable of SMBus operation (one channel) * RSPI (one channel): Transfer at up to 16 Mbps (768-Kbyte/1-Mbyte flash memory or 144/145-pin products) * External address space * Four CS areas (4 × 16 Mbytes) * 8- or 16-bit bus space is selectable per area * Up to 20 extended-function timers * 16-bit MTU: input capture, output compare, complementary PWM output, phase counting mode (six channels) * 16-bit TPU: input capture, output capture, phase counting mode (six channels) * 8-bit TMR (four channels) * 16-bit compare-match timers (four channels)

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