S34ML04G200TFI000 - Cypress Semiconductor

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

S34ML04G200TFI000
Manufacturer

Cypress Semiconductor
ChipWorker Part#

CW4098100
Category

Flash Memory, Flash
Package

TSOP-48
Description

S34ML04G2 Series 4GB (512M x 8) 3V SMT Embedded NAND Flash Memory - TSOP-48
Documentation

Datasheet

S34ML04G200TFI000 Global Supplier

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S34ML04G200TFI000 Specifications

Attribute	Attribute Value

Part Number	S34ML04G200TFI000
Manufacturer	Cypress Semiconductor
ChipWorker Part#	CW4098100
Category	Flash Memory, Flash
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	48 Pin
Case/Package	TSOP-48
Supply Voltage (DC)	2.70V (min)
Supply Current	30 mA
Number of Positions	48 Position
Number of Bits	8 Bit
Access Time	25 ns
Memory Size	256000000 B
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	2.7V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	2.7 V
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Size-Length	18.5 mm
Size-Width	12.1 mm
Size-Height	1.05 mm
Operating Temperature	-40℃ ~ 85℃ (TA)
Product Lifecycle Status	Unknown
Packaging	Each
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance Edition	2015/12/17
ECCN Code	3A991.b.1.a
HK STC License	NLR

Product Description

The S34ML04G200TFI000 is a 4GB SLC NAND Flash Memory for embedded. It is offered in 3.3VCC and VCCQ power supply and with x8 or x16 I/O interface. The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased. The page size for x8 is (2048 + spare) bytes for x16 (1024 + spare) words. The chip supports CE# don"t care function. This function allows the direct download of the code from the NAND flash memory device by a microcontroller, since the CE# transitions do not stop the read operation. The device has a read cache feature that improves the read throughput for large files. During cache reading, the device load the data in a cache register while the previous data is transferred to the I/O buffers to be read. In multiplane operations, data in the page can be read out at 25ns cycle time per byte. The I/O pins serve as the ports for command and address input as well as data input/output.

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