S912ZVML12F1MKH - NXP

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

S912ZVML12F1MKH
Manufacturer

NXP
ChipWorker Part#

CW74340258
Category

Microcontroller, MCU IC
Package

QFP-64
Description

MCU 16Bit HCS12 S12Z CISC 128Mb Flash 64Pin LQFP EP Tray
Documentation

Datasheet

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S912ZVML12F1MKH Specifications

Attribute	Attribute Value

Part Number	S912ZVML12F1MKH
Manufacturer	NXP
ChipWorker Part#	CW74340258
Category	Microcontroller, MCU IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	64 Pin
Case/Package	QFP-64
Number of Positions	64 Position
Clock Speed	50.0 MHz
RAM Memory Size	1 KB
Number of Bits	16 Bit
FLASH Memory Size	128 KB
Number of Inputs and Outputs	64 Input IO
Supply Voltage (Max)	40 V
Supply Voltage (Min)	3.5 V
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Operating Temperature	-40℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Each
RoHS	RoHS Compliant
Lead-Free Status
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/12/17

Product Description

The S912ZVML12F1MKH is a MagniV mixed signal S12ZVM-family 16-bit Microcontroller using the NVM + UHV technology that offers the capability to integrate 40V analog components. This family reuses many features from the existing S12/S12X portfolio. The particular differentiating features of this family are the enhanced S12Z core, the combination of dual-ADC synchronized with PWM generation and the integration of "high-voltage" analog modules, including the voltage regulator, Gate Drive Unit and either Local Interconnect Network physical layer or CAN Physical layer. The MC9S12ZVM-Family includes error correction code (ECC) on RAM and flash memory, EEPROM for diagnostic or data storage, a fast analog-to-digital converter (ADC) and a frequency modulated phase locked loop (IPLL) that improves the EMC performance. The MC9S12ZVM-Family allows the integration of several key system components into a single device, optimizing system architecture and achieving significant space savings.
Harvard architecture - parallel data and code access
3-Stage pipeline
32-bit Wide instruction and data bus
32-bit ALU
24-bit Addressing (16MB linear address space)
Phase locked loop (IPLL) frequency multiplier with internal filter
1MHz Internal RC oscillator with +/-1.3% accuracy
4-20MHz Amplitude controlled pierce oscillator
Internal COP (watchdog) module
6-channel, 15-bit pulse width modulator with fault protection (PMF)
Low side and high side FET pre-drivers for each phase
2 Parallel ADC with 12-bit resolution
Programmable trigger unit (PTU) for synchronization of PMF and ADC
Serial peripheral interface (SPI) module
SCI module with interface to internal LIN physical layer transceiver
Additional SCI (not connected to LIN physical layer)
4-channel Timer module (TIM0) with input capture/output compare
MSCAN (1Mbps, CAN 2.0 A, B software compatible) module
On-chip voltage regulator (VREG)
2 Current sense circuits for overcurrent detection or torque measurement

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