SN65LVDS049PW - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN65LVDS049PW
Manufacturer

TI
ChipWorker Part#

CW20039839
Category

LVDS, M-LVDS, ECL, CML IC
Package

TSSOP-16
Description

TEXAS INSTRUMENTS SN65LVDS049PW Transceiver, LVDS, 400Mbps, 17mA, 3V to 3.6V, TSSOP-16
Documentation

Datasheet

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SN65LVDS049PW Specifications

Attribute	Attribute Value

Part Number	SN65LVDS049PW
Manufacturer	TI
ChipWorker Part#	CW20039839
Category	LVDS, M-LVDS, ECL, CML IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	16 Pin
Case/Package	TSSOP-16
Supply Voltage (DC)	3.00V (min)
Supply Current	17.0 mA
Number of Positions	16 Position
Power Dissipation	774 W
Data Rate	400 Mbps
Input Current (Min)	20 μA
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Power Dissipation (Max)	774 mW
Supply Voltage	3V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	3 V
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Size-Length	5 mm
Size-Width	4.4 mm
Size-Height	1.15 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99
HK STC License	NLR

Product Description

The SN65LVDS049PW is a dual high-speed Differential Driver and Receiver uses low-voltage differential signaling (LVDS) to achieve signaling rates as high as 400Mbps. The driver and receiver electrical interfaces are compliant to the TIA/EIA-644-A standard. The intended application of this device and signaling technique is for point-to-point baseband data transmission over controlled impedance media of approximately 100R characteristic impedance. The transmission media may be printed-circuit board traces, backplanes or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment and other application specific characteristics.
Flow-through pin-out
High-impedance disable for all outputs
Internal failsafe biasing of receiver inputs
High-impedance bus pins on power-down
50ps Driver channel-to-channel skew (typical)
50ps Receiver channel-to-channel skew (typical)
1.4ns Driver propagation delay (typical)
1.9ns Receiver propagation delay (typical)
Green product and no Sb/Br

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