SN65LVDS100D - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN65LVDS100D
Manufacturer

TI
ChipWorker Part#

CW6747400
Category

Voltage Level Translator IC
Package

SOIC-8
Description

Repeater/Translator (>1Gbps) 2Gbps LVDS/LVPECL/CML to LVDS Repeater/Translator LVDS Translator/Repeater 0.454V 8Pin SOIC Tube
Documentation

Datasheet

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SN65LVDS100D Specifications

Attribute	Attribute Value

Part Number	SN65LVDS100D
Manufacturer	TI
ChipWorker Part#	CW6747400
Category	Voltage Level Translator IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	8 Pin
Case/Package	SOIC-8
Supply Voltage (DC)	3.00V (min)
Output Current	12 µA
Supply Current	25 mA
Number of Channels	1 Channel
Number of Positions	8 Position
Power Dissipation	481 mW
Data Rate	2.00 Gbps
Input Capacitance	.6 pF
Rise Time	220 ps
Input Voltage (Max)	0.1 V
Input Voltage (Min)	0.1 V
Output Voltage (Max)	0.454 V
Input Current (Min)	66 μA
Number of Inputs	2 Input
Fall Time	220 ps
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Power Dissipation (Max)	481 mW
Supply Voltage	3V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	3 V
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Size-Length	4.9 mm
Size-Width	3.91 mm
Size-Height	1.58 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The SN65LVDS100D is a 2Gbps LVDS/LVPECL/CML to LVDS Repeater/Translator formed by connecting high-speed differential receivers and drivers. The receiver accepts low-voltage differential signaling (LVDS), positive-emitter-coupled logic (PECL) or current-mode logic (CML) input signals at rates up to 2Gbps and repeats it as either an LVDS or PECL output signal. The signal path through the device is differential for low radiated emissions and minimal added jitter. The output is LVDS levels as defined by TIA/EIA-644-A. The output is compatible with 3.3V PECL levels. Both drive differential transmission lines with nominally 100R characteristic impedance. It includes an 110R differential line termination resistor for less board space, fewer components and the shortest stub length possible. It does not include the VBB voltage reference. The VBB provides a voltage reference of typically 1.35V below VCC for use in receiving single-ended input signals.
Low power alternative for the MC100EP16
Inputs electrically compatible with LVPECL, CML and LVDS signal levels
<65ps Total jitter
Low 100ps (Maximum) part-to-part skew
25mV of Receiver input threshold hysteresis over 0 to 4V input voltage range
Green product and no Sb/Br

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