SN65LVDS100DGKR - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN65LVDS100DGKR
Manufacturer

TI
ChipWorker Part#

CW1562903
Category

Interface IC, Interface Controller
Package

VSSOP-8
Description

Repeater/Translator (>1Gbps) 2Gbps LVDS/LVPECL/CML to LVDS Repeater/Translator LVDS Translator/Repeater 0.454V 8Pin VSSOP T/R
Documentation

Datasheet

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SN65LVDS100DGKR Specifications

Attribute	Attribute Value

Part Number	SN65LVDS100DGKR
Manufacturer	TI
ChipWorker Part#	CW1562903
Category	Interface IC, Interface Controller
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	8 Pin
Case/Package	VSSOP-8
Supply Voltage (DC)	3.00V (min)
Supply Current	25 mA
Number of Channels	1 Channel
Power Dissipation	377 mW
Input Capacitance	0.6 pF
Input Voltage (Max)	0.1 V
Output Voltage (Max)	0.454 V
Input Current (Min)	66 μA
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Power Dissipation (Max)	377 mW
Supply Voltage	3V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	3 V
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Size-Length	3 mm
Size-Width	3 mm
Size-Height	0.97 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance Edition	2015/06/15

Product Description

DESCRIPTION
The SN65LVDS100, SN65LVDT100, SN65LVDS101, and SN65LVDT101 are a high-speed differential receiver and driver connected as a repeater. The receiver accepts low-voltage differential signaling
(LVDS), positive-emitter-coupled logic (PECL), or current-mode logic (CML) input signals at rates up to 2
Gbps and repeats it as either an LVDS or PECL output signal. The signal path through the device is
differential for low radiated emissions and minimal added jitter.
FEATURES
• Designed for Signaling Rates(1) ≥ 2 Gbps
• Total Jitter < 65 ps
• Low-Power Alternative for the MC100EP16
• Low 100 ps (Max) Part-To-Part Skew
• 25 mV of Receiver Input Threshold Hysteresis Over 0-V to 4-V Common-Mode Range
• Inputs Electrically Compatible With LVPECL, CML, and LVDS Signal Levels
• 3.3-V Supply Operation
• LVDT Integrates 110-Ω Terminating Resistor
• Offered in SOIC and MSOP
APPLICATIONS
• 622 MHz Central Office Clock Distribution
• High-Speed Network Routing
• Wireless Basestations
• Low Jitter Clock Repeater
• Serdes LVPECL Output to FPGA LVDS Input Translator

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