SN65LVDS32BD - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN65LVDS32BD
Manufacturer

TI
ChipWorker Part#

CW22322503
Category

Interface IC, Interface Controller
Package

SOIC-16
Description

TEXAS INSTRUMENTS SN65LVDS32BD LVDS Driver, Differential Line Receiver, 23mA, -40℃, 85℃, 3V
Documentation

Datasheet

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SN65LVDS32BD Specifications

Attribute	Attribute Value

Part Number	SN65LVDS32BD
Manufacturer	TI
ChipWorker Part#	CW22322503
Category	Interface IC, Interface Controller
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	16 Pin
Case/Package	SOIC-16
Supply Voltage (DC)	3.00V (min)
Supply Current	16 mA
Number of Positions	16 Position
Power Dissipation	950 W
Input Current (Min)	80 μA
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Power Dissipation (Max)	950 mW
Supply Voltage	3V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	3 V
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Size-Length	9.9 mm
Size-Width	3.91 mm
Size-Height	1.58 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Cut Tape (CT)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The SN65LVDS32BD is a quad differential Line Receiver offers improved performance and features that implement the electrical characteristics of low-voltage differential signalling (LVDS). LVDS is defined in the TIA/EIA-644 standard. This improved performance represents the second generation of receiver products for this standard, providing a better overall solution for the cabled environment. This generation of products is an extension to TIs overall product portfolio and is not necessarily a replacement for older LVDS receivers. Improved features include an input common-mode voltage range 2V wider than the minimum required by the standard. This will allow longer cable lengths by tripling the allowable ground noise tolerance to 3V between a driver and receiver. Precise control of the differential input voltage thresholds now allows for inclusion of 50mV of input voltage hysteresis to improve noise rejection on slowly changing input signals.
Active failsafe assures a high-level output with no input
Inputs remain high-impedance on power-down
Integrated 110R line termination resistors offered with the LVDT series
Pin-compatible with the AM26LS32, MC3486 or µA9637
4ns Typical propagation delay time
400Mbps Signalling rate
Green product and no Sb/Br

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