SN74ALVCH16245DGGR - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74ALVCH16245DGGR
Manufacturer

TI
ChipWorker Part#

CW19792233
Category

Logic Controller, Logic IC
Package

TSSOP-48
Description

Transceiver, 74ALVC16245, 1.65V to 3.6V, TSSOP-48
Documentation

Datasheet

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SN74ALVCH16245DGGR Specifications

Attribute	Attribute Value

Part Number	SN74ALVCH16245DGGR
Manufacturer	TI
ChipWorker Part#	CW19792233
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	48 Pin
Case/Package	TSSOP-48
Supply Voltage (DC)	1.65V ~ 3.60V
Number of Circuits	2 Circuit
Number of Channels	16 Channel
Number of Positions	48 Position
Number of Bits	16 Bit
Propagation Delay Max (tpd)	3.00 ns
Voltage Nodes	3.30 V, 2.70 V, 2.50 V, 1.80 V
Output Current Drive	-1.00 mA
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	1.65V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	1.65 V
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Size-Length	12.5 mm
Size-Width	6.1 mm
Size-Height	1.05 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The SN74ALVCH16245DGGR is a 16-bit Bus Transceiver with 3-state outputs and designed for 1.65 to 3.6V VCC operation. This device is designed for asynchronous communication between two data buses. The logic levels of the direction-control input and the output-enable input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports is always active and must have a logic high or low level applied to prevent excess ICC and ICCZ. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor and the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry holds unused or un-driven inputs at a valid logic state.
Bus hold on data inputs eliminates the need for external pull-up/pull-down resistors
3ns at 3.3V Propagation delay (tpd)
±24mA Output drive at 3.3V
Latch-up performance exceeds 250mA per JESD 17
Green product and no Sb/Br

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