SN74ALVCH16373DL - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74ALVCH16373DL
Manufacturer

TI
ChipWorker Part#

CW35279680
Category

Latche IC
Package

SSOP-48
Description

16Bit Transparent D-Type Latch With 3-State Outputs 48-SSOP -40℃ to 85℃
Documentation

Datasheet

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SN74ALVCH16373DL Specifications

Attribute	Attribute Value

Part Number	SN74ALVCH16373DL
Manufacturer	TI
ChipWorker Part#	CW35279680
Category	Latche IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	48 Pin
Case/Package	SSOP-48
Supply Voltage (DC)	1.65V ~ 3.60V
Number of Outputs	16 Output
Output Current	24 mA
Number of Circuits	2 Circuit
Number of Positions	48 Position
Number of Bits	16 Bit
Propagation Delay Max (tpd)	3.60 ns
Polarity	Non-Inverting
Voltage Nodes	3.30 V, 2.70 V, 2.50 V, 1.80 V
Output Current Drive	-1.00 mA
Number of Inputs	16 Input
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	1.65V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	1.65 V
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Size-Length	16 mm
Size-Width	7.59 mm
Size-Height	2.59 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
ECCN Code	EAR99

Product Description

This 16-bit transparent D-type latch is designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVCH16373 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. This device can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.
A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components. OE\ does not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

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