SN74AUP2G08DCUR - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74AUP2G08DCUR
Manufacturer

TI
ChipWorker Part#

CW2083637
Category

Logic Control, Logic Gate IC
Package

VSSOP-8
Description

AND Gate 2Element 2IN CMOS 8Pin VSSOP T/R
Documentation

Datasheet

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SN74AUP2G08DCUR Specifications

Attribute	Attribute Value

Part Number	SN74AUP2G08DCUR
Manufacturer	TI
ChipWorker Part#	CW2083637
Category	Logic Control, Logic Gate IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	8 Pin
Case/Package	VSSOP-8
Supply Voltage (DC)	800mV ~ 3.60V
Number of Outputs	1 Output
Output Current	4 mA
Number of Circuits	2 Circuit
Number of Positions	8 Position
Number of Bits	2 Bit
Propagation Delay Max (tpd)	4.30 ns
Voltage Nodes	3.30 V, 2.50 V
Number of Gates	2 Gate
Output Current Drive	-1.00 mA
Number of Inputs	2 Input
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	0.8V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	0.8 V
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Size-Length	2.3 mm
Size-Width	2 mm
Size-Height	0.85 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15

Product Description

The SN74AUP2G08DCUR is a low-power dual 2-input positive-AND Gate and performs the Boolean function Y = A • B or Y = (A\ + B\\)\ in positive logic. The AUP family is premier solution to the industry"s low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.8 to 3.6 V, resulting in increased battery life. This product also maintains excellent signal integrity. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
0.9µA Low static-power consumption (ICC)
4.3pF Low dynamic-power consumption (Cpd)
1.5pF Low input capacitance (Ci)
<10% of VCC Low Noise - overshoot and undershoot
Ioff supports partial-power-down mode operation
Schmitt-trigger action allows slow input transition and better switching noise immunity at the Input
Optimized for 3.3V operation and 3.6V I/O tolerant
5.9ns Propagation delay (tPD)
Suitable for point-to-point applications
Latch-up performance exceeds 100mA per JESD 78, Class II
ESD Performance Tested Per JESD 22
Green product and no Sb/Br

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