SN74AVC16T245DGGR - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74AVC16T245DGGR
Manufacturer

TI
ChipWorker Part#

CW652800
Category

Logic Controller, Logic IC
Package

TSSOP-48
Description

1.2V to 3.6V, 16Bit dual-supply bus transceiver with configurable voltage translation and 3-state output@
Documentation

Datasheet

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SN74AVC16T245DGGR Specifications

Attribute	Attribute Value

Part Number	SN74AVC16T245DGGR
Manufacturer	TI
ChipWorker Part#	CW652800
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	48 Pin
Case/Package	TSSOP-48
Supply Voltage (DC)	1.20V ~ 3.60V
Output Current	12 mA
Number of Circuits	2 Circuit
Number of Channels	16 Channel
Number of Positions	48 Position
Number of Bits	16 Bit
Propagation Delay Max (tpd)	5.00 ns
Voltage Nodes	1.20 V, 1.50 V, 1.80 V, 2.50 V, 3.30 V
Number of Inputs	16 Input
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Number of Output Channels	1 Channel
Supply Voltage	1.2V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	1.2 V
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Size-Length	12.6 mm
Size-Width	6.2 mm
Size-Height	1.05 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99
HK STC License	NLR

Product Description

The SN74AVC16T245DGGR is a 16-bit dual-supply Bus Transceiver with configurable voltage-level shifting and 3-state outputs. The SN74AVC16T245 device is designed for asynchronous communication between data buses. The device transmits data from the A-bus to the B-bus or from the B-bus to the A-bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses effectively are isolated. The SN74AVC16T245 control pins is supplied by VCCA. This device is fully specified for partial-power-down applications using IOFF. The IOFF circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCC isolation feature ensures that if either VCC input is at GND, both ports are in the high-impedance state.
Control inputs VIH/VIL levels are referenced to VCCA voltage
Overvoltage-tolerant inputs and outputs allow mixed-voltage-mode data communications
Fully configurable dual-rail design
IOFF supports partial-power-down mode operation
I/Os are 4.6V tolerant
Latch-up performance exceeds 100mA per JESD 78
ESD protection exceeds JESD 22
Green product and no Sb/Br

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