SN74CB3Q3306APWR - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74CB3Q3306APWR
Manufacturer

TI
ChipWorker Part#

CW8687496
Category

Logic Controller, Logic IC
Package

TSSOP-8
Description

Bus Switch 2Element CMOS 2IN 8Pin TSSOP T/R
Documentation

Datasheet

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SN74CB3Q3306APWR Specifications

Attribute	Attribute Value

Part Number	SN74CB3Q3306APWR
Manufacturer	TI
ChipWorker Part#	CW8687496
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	8 Pin
Case/Package	TSSOP-8
Supply Voltage (DC)	2.30V ~ 3.60V
Input Voltage (DC)	1.70 V
Output Voltage	5.5 V
Output Current	30 A
Contacts Type	SPST
Number of Channels	2 Channel
Number of Positions	8 Position
Drain to Source Resistance (on) (Rds)	4 Ω
Number of Bits	2 Bit
Propagation Delay Max (tpd)	200 ps
Polarity	Non-Inverting
Voltage Nodes	2.50 V, 3.30 V
Quiescent Current	250 µA
Bandwidth	500 MHz
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	2.3V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	2.3 V
Input Voltage	1.7 V
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Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The SN74CB3Q3306APWR is a dual FET low-voltage high-bandwidth Bus Switch utilizes a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3306A provides an optimized interface solution ideally suited for broadband communications, networking and data-intensive computing systems. It is organized as two 1-bit switches with separate OE (1OE\, 2OE\\) inputs. It can be used as two 1-bit bus switches or as one 2-bit bus switch. When OE\ is low, the associated 1-bit bus switch is ON and the A port is connected to the B port, allowing bidirectional data flow between ports.
High-bandwidth data path (up to 500MHz)
5V Tolerant I/Os with device powered up or powered down
Low and flat ON-state resistance (ron) characteristics
Rail-to-rail switching on data I/O ports
Bidirectional data flow with near-zero propagation delay
Low input/output capacitance minimizes loading and signal distortion
Data and control inputs provide undershoot clamp diodes
0.25mA Typical low power consumption
Control inputs can be driven by TTL or 5/3.3V CMOS outputs
Ioff Supports partial-power-down mode operation
Latch-up performance exceeds 100mA per JESD 78, Class II
Supports both digital and analog applications
Green product and no Sb/Br

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